2402704_en-US

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FRDM-MCX N947 and OV5640 Camera

I am currently porting a camera streaming pipeline (previously working on ESP32-S3) to the FRDM-MCXN947. The target resolution is 1080p capturing from an OV5640 camera module, processing via MCXN947 hardware accelerators, and streaming over SPI to an ESP32-C5 for Wi-Fi transmission.

Hardware Pipeline:
OV5640 Camera (DVP 8-bit) -> MCXN947 (FlexIO / SmartDMA) -> External PSRAM -> SPI -> ESP32-C5 -> Wi-Fi

Current Progress & Setup

SCCB / I2C Control: Fully functional. Camera register read/write operations succeed, and initialization passes.
SmartDMA Baseline: Tested the stock NXP SDK SmartDMA examples for the OV7670 (using internal SRAM), which works as expected.
Goal: Expand this to 1080p resolution using the OV5640 with external PSRAM buffering and FlexIO capture.

Issue 1: FlexIO Pin Remapping & Invalid Data on D4/D5

When attempting 8-bit parallel capture via FlexIO, data lines D4 and D5 fail to read valid pixel data, while lines D0-D3, D6, and D7 behave correctly.

Initial Pin Mapping:

D0-D3: P1_4, P1_5, P1_6, P1_7
D4-D5: P3_4, P3_5 (Problematic: No valid pixel data)
D6-D7: P1_10, P1_11
Control: VSYNC -> P1_18, HREF -> P1_19, XCLK -> P2_2
SCCB: SCL -> P3_2, SDA -> P3_3

Troubleshooting Attempted:

I attempted remapping D4 and D5 to alternative pins and updated the corresponding FlexIO and Pin Mux configurations:

Remapped D4: P2_8
Remapped D5: P2_9

Even with this remapping, D4 and D5 still do not capture valid data.

Issue 2: SmartDMA Routing to External PSRAM for 1080p

Because 1080p frame buffers exceed internal SRAM capacity, frames must be buffered into external PSRAM in real time.

I am seeking best practices and configuration steps to configure SmartDMA to route incoming FlexIO camera data directly to external PSRAM without CPU intervention or frame tearing.

Any insights, pin mapping suggestions, or reference code would be greatly appreciated!

Board Design

MCXN