Dear All,
I'm trying to get rid of the REG_CORRUPT' flag on the FS26 - the two snip pictures attached show a read of all the relevant registers.
Immediately prior to the first 'AE' read command, I have just done a successful first kick of the watchdog to take the FS state machine out of INIT_FS such that the fail-safe register state is assessed for correctness, and you can see from the 0x28 answer that we are in debug mode with the REG_CORRUPT bit set.
I am certain the watchdog kick was successful because I read FS_DIAG_SAFETY1 straight after the kick - returned value is 0x0103 - no error flags, just ABIST1_OK and LBIST_STATUS = OK.
After the 0xAE command, I issue an 0xAF attempting to write 0x1800 to the register to clear the OTP_CORRUPT and REG_CORRUPT bits, and then I do a read of all 12 FS registers in order starting at register 0x41 (obviously the command is 0x82 when shifted).
I have looked at the values returned from these registers and I can't see a consistency problem with the returned values (obviously taking into account the bits that we're not supposed to write to and bits that are held/reserved/0/1).
You can see from a final read of FS_STATES at the end that REG_CORRUPT is still set.
Sorry to ask such a direct question, but what am I missing?
Kind Regards,
Andrew
Dear Erika,
Thanks for responding - I have checked that many times already, which is why I posted the complete state of the registers in the images of my original posting. Please let me know if you think there's an issue with how these are configured.
As far as I can tell, the registers are correct (taking into account only the bits that are writable according to the datasheet). I assume the chip itself takes care that the read-only bits are in a valid state, and I assume the bits that are specified as '0' or 'reserved' are not writable.
Is it possible that a write to one of those bits can cause the REG_CORRUPT bit to remain asserted?
Kind Regards,
Andrew
Hello!
For REG_CORRPUT bit, it will be asserted shown as below, meaning when FS registers are configured, a NOT register is must to be configured together With XOR rules.
Please check if there are some register configuration did not follow the rules that cause this bit asserted ?