2401043_en-US

[#1]

S32K311 LCU Rise/Fall Filter Deadtime Occasionally Reduced from 2 µs to 1 µs

Hi NXP Team,

I am using an S32K311 with RTD 5.0.

The PWM signals are generated by eMIOS0 and routed directly to the LCU0 outputs:

eMIOS0_CH0 -> LCU0_OUT0

eMIOS0_CH1 -> LCU0_OUT1

eMIOS0_CH2 -> LCU0_OUT2

eMIOS0_CH3 -> LCU0_OUT3

eMIOS0_CH4 -> LCU0_OUT4

eMIOS0_CH5 -> LCU0_OUT5

The LCU is configured to insert deadtime using the Rise/Fall Filter.

Configuration

• MCU: S32K311
• RTD Version: 5.0
• PWM source: eMIOS0
• Deadtime generation: LCU Rise/Fall Filter
• Rise Filter on Highside Channels = 192
• Fall Filter on Lowside Channels = 192
• Configured deadtime = 2 µs

Observed behavior

Most switching events generate the expected 2 µs deadtime.

However, occasionally one transition (either the rising edge or the falling edge) has only about 1 µs deadtime instead of 2 µs. This occurs intermittently while the PWM frequency and duty cycle remain unchanged.

The attached logic analyzer capture shows this behavior.

Questions

1. Is this variation expected when using the LCU Rise/Fall Filter?
2. Are there any synchronization requirements between the eMIOS outputs and the LCU filter?
3. Can the LCU filter occasionally shorten the programmed delay due to internal synchronization or clock-domain crossing?
4. Is there any known limitation or errata related to the Rise/Fall Filter on the S32K311?

Any guidance would be appreciated.

Thank you.

Re: S32K311 LCU Rise/Fall Filter Deadtime Occasionally Reduced from 2 µs to 1 µs

Hi@Esakki

1.

Your value 192 = 2 µs implies an LCU filter tick of about：

2us / 192 = 10.4167 ns

-> 1/ 10.4167 ns = 96MHz,

If the effective LCU/peripheral clock or prescaler changes, or if a different clock is selected than assumed, the real delay changes.

2.Using an oscilloscope for testing is more accurate, and the waveform is related to the external capacitive reactance; a large capacitive reactance can also cause waveform instability.