The automatic last clock issue (-110) was resolved after I used `clocks = `. However, after adding the relevant driver patch for `imx8mp-blk-ctrl.c`, a new problem arose:
gaotao_0-1785488087635.png
The link up keeps failing, and the PCIE_PORT_DDEBUG1 error code is sometimes 0x18000000, sometimes 0x08000000, and sometimes 0x08200000.
Below is the waveform captured by the oscilloscope:
gaotao_1-1785488227600.jpeg
&pcie_phy {
clocks = < &hsio_blk_ctrl >;
//clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
clock-names = "ref" ;
fsl,clkreq-unsupported;
fsl,refclk-pad-mode = < IMX8_PCIE_REFCLK_PAD_OUTPUT >;
status = "okay" ;
};
&pcie {
pinctrl-names = "default" ;
pinctrl-0 = < &pinctrl_pcie0 >;
reset-gpio = < &gpio3 25 GPIO_ACTIVE_LOW >;
clocks = < &clk IMX8MP_CLK_HSIO_ROOT >,
< &clk IMX8MP_CLK_PCIE_ROOT >,
< &clk IMX8MP_CLK_HSIO_AXI >;
clock-names = "pcie" , "pcie_aux" , "pcie_bus" ;
assigned-clocks = < &clk IMX8MP_CLK_PCIE_AUX >;
assigned-clock-rates = < 10000000 >;
assigned-clock-parents = < &clk IMX8MP_SYS_PLL2_50M >;
// vpcie-supply = <®_pcie0>;
ext_osc = < 1 >;
max-link-speed = < 1 >;
reset-delay-us = < 50000 >;
status = "okay" ;
}
The reset measurement is correct, but it's a direct hardware reset, not controlled by software.
Below is the schematic diagram.
gaotao_2-1785488320895.png hopes to get some help! Thank you everyone!
Hello,
Do you see your device when using lspci -v?
I see some issues in your device tree:
If you are trying to provide clock from processor internal clock, pcie node, you should put:
ext_osc = <0>;
Instead:
ext_osc = <1>;
The log shows that the processor side is fully operational, the issue seems to be caused in 8W8822CE side since is not responding at all.
Is it correctly powered?
Best regards.