Hi, working with a custom board and we need to change a functional flash for Macronix MX25U51245G 54 because of supply chain issues. I've had issues with what I suspect is the SFDP discovery using the bootloader ROM API.
Here is the schematics connection:
By default, with the new flash, I can't perform write/erase operations properly using either the serial downloader or LinkServer. Reading the flash however seems to work.
I was able to properly write/read/erase on the new flash by modifying example project evkbmimxrt1170_flexspi_nor_polling_transfer_cm7 from SDK 25.12.00 to run on RAM (TCM) and changing only tcustomLUT in board/hardware_init.c. Here is the LUT in question:
const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04,
kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0
),
[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x0A,
kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04
),
[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x0A,
kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04
),
[4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06,
kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0
),
[4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04,
kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0
),
[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x38,
kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x20
),
[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04,
kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0
),
[4 * NOR_CMD_LUT_SEQ_IDX_READID] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F,
kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x03
),
[4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x01,
kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x02
),
[4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05,
kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x01
),
[4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =
FLEXSPI_LUT_SEQ(
kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7,
kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0
),
};Are there known issues with this flash device and the bootloader API or SFDP discovery?
Hi @achampoux ,
Thanks for your interest in NXP MIMXRT series!
I checked the datasheet for the Flash chip you're using (MX25U51245G 54) and found that it appears to have some unique features.
Most importantly: 4-Byte Address Mode permanent
I suspect that the LUT automatically generated by flashloader may not be using the 4-byte address mode. I recommend that you check this by looking at the fsl_romapi project in SDK.