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[#1]

The IMX8MP PCIe internal clock PHY poweron failed --> -110

imx8mp + nxp linux6.1.55 When debugging Wi-Fi in the kernel, the following issue occurred with PCIe: testing the internal clock showed no waveform, and reset-GPIO was at a high level
( https://github.com/nxp-imx/linux-imx/tree/lf-6.1.y ).)

root@imx8mpevk:~# dmesg|grep pcie
[2.241914] imx6q-pcie 33800000.pcie: host bridge /soc@0/pcie@33800000 ranges:
[2.249233] imx6q-pcie 33800000.pcie: IO 0x001ff80000..0x001ff8ffff -> 0x0000000000
[2.257455] imx6q-pcie 33800000.pcie: MEM 0x0018000000..0x001fefffff -> 0x0018000000
[2.322972] phy phy-32f00000.pcie-phy.4: Phy poweron failed --> -110
[2.322980] imx6q-pcie 33800000.pcie: waiting for PHY ready timeout!
[ 2.323033] imx6q-pcie: probe of 33800000.pcie failed with error -110

Device tree:

&pcie_phy {

    //clocks = <&hsio_blk_ctrl>;

clocks = < &clk IMX8MP_CLK_HSIO_AXI >;

clock-names = "ref" ;

fsl,clkreq-unsupported;

fsl,refclk-pad-mode = < IMX8_PCIE_REFCLK_PAD_OUTPUT >;

status = "okay" ;

};

&pcie {

pinctrl-names = "default" ;

pinctrl-0 = < &pinctrl_pcie0 >;

reset-gpio = < &gpio3 25 GPIO_ACTIVE_LOW >;

reset-gpio-active-high;

clocks = < &clk IMX8MP_CLK_HSIO_ROOT >,

< &clk IMX8MP_CLK_PCIE_ROOT >,

< &clk IMX8MP_CLK_HSIO_AXI >;

clock-names = "pcie" , "pcie_aux" , "pcie_bus" ;

assigned-clocks = < &clk IMX8MP_CLK_PCIE_AUX >;

assigned-clock-rates = < 10000000 >;

assigned-clock-parents = < &clk IMX8MP_SYS_PLL2_50M >;

    // vpcie-supply = <&reg_pcie0>;

status = "okay" ;

    // wifi_wake_host {

    // compatible = "nxp,wifi-wake-host";

    // interrupt-parent = <&gpio5>;

    // interrupts = <21 IRQ_TYPE_LEVEL_LOW>;

    // interrupt-names = "host-wake";

    // };

};

If selected

    clocks = <&hsio_blk_ctrl>; instead of clocks = <&clk IMX8MP_CLK_HSIO_AXI>;

Then an error will occur and a timeout will occur.
root@imx8mpevk:~# dmesg|grep pcie

[4.081133] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock

[4.088341] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock: -517

[13.028064] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock

[13.035248] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock: -517

[13.049053] platform 33800000.pcie: deferred probe pending

[13.060015] platform 32f00000.pcie-phy: deferred probe pending 

Below is my schematic diagram.

What went wrong? I need your help! Thank you!

i.MX 8M | i.MX 8M Mini | i.MX 8M NanoRe: imx8mp pcie内部时钟phy poweron failed --> -110

Hello @gaotao 

Hope you are doing very well.

From your DTS reset-gpio = <&gpio3 25 GPIO_ACTIVE_LOW> and reset-gpio-active-high together are contradictory.

Remove reset-gpio-active-high and keep only GPIO_ACTIVE_LOW in the GPIO specifier, or change to GPIO_ACTIVE_HIGH if your hardware has an inverter.

Also, please try applying the below patches:

https://www.spinics.net/lists/devicetree/msg558950.html 
https://www.spinics.net/lists/devicetree/msg558947.html 
https://www.spinics.net/lists/devicetree/msg558949.html
https://www.spinics.net/lists/devicetree/msg558948.html

These patch the imx8mp-blk-ctrl.c driver to expose a proper PLL clock and configure it.

Best regards,

Salas.

Re: imx8mp pcie内部时钟phy poweron failed --> -110Thank you very much for reminding me. I will inform my colleagues in the hardware department to look into this issue. I will contact you again if there are any further developments and thank you again.Re: imx8mp pcie内部时钟phy poweron failed --> -110

@Manuel_Salas , thank you so much for your reply.

1. I also realized that `reset-gpio-active-high;` was there and have already deleted it. Thanks for reminding me.

2. Therefore, I should use

clocks = < &hsio_blk_ctrl >; and add those four driver patches, instead of using...

clocks = <&clk IMX8MP_CLK_HSIO_AXI>; right?

3. I also saw someone else in the community reply earlier that they used those four patches, but unfortunately it seems that we can't access that website in our area. I'll think of a way. If it's convenient, I hope you can post the patches directly. Thank you very much!

Re: imx8mp pcie内部时钟phy poweron failed --> -110

It seems like the problem is different now. It's reporting "Phylink never came up". Is there a problem with the PCIe itself, or is there a problem with the peripheral?
root@imx8mpevk:~/rtw# dmesg|grep pcie
[2.264927] imx8-pcie-phy 32f00000.pcie-phy: wifi PCIe ref clk: 100000000 Hz
[2.274508] imx6q-pcie 33800000.pcie: host bridge /soc@0/pcie@33800000 ranges:
[2.281827] imx6q-pcie 33800000.pcie: IO 0x001ff80000..0x001ff8ffff -> 0x0000000000
[2.290063] imx6q-pcie 33800000.pcie: MEM 0x0018000000..0x001fefffff -> 0x0018000000
[2.336901] imx6q-pcie 33800000.pcie: iATU: unroll T, 4 ob, 4 ib, align 64K, limit 16G
[3.410666] imx6q-pcie 33800000.pcie: Phy link never came up1
[4.481178] imx6q-pcie 33800000.pcie: Phy link never came up1
[4.487067] imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00
[4.570576] pcieport 0000:00:00.0: PME: Signaling with IRQ 223

My peripheral device uses an 8822ce Wi-Fi chip, and it doesn't output any information whether I load it manually or automatically.
root@imx8mpevk:~/rtw# insmod rtw88_core.ko
root@imx8mpevk:~/rtw# insmod rtw88_pci.ko
root@imx8mpevk:~/rtw# insmod rtw88_8822c.ko
root@imx8mpevk:~/rtw# insmod rtw88_8822ce.ko
root@imx8mpevk:~/rtw#
root@imx8mpevk:~/rtw# lsmod | grep rtw
rtw88_8822ce 16384 0
rtw88_8822c 475136 1 rtw88_8822ce
rtw88_pci 28672 1 rtw88_8822ce
rtw88_core 208896 2 rtw88_pci,rtw88_8822c

root@imx8mpevk:~/rtw# lspci
00:00.0 Class 0604: 16c3:abcd

What could be the problem this time? After the startup stabilized, I couldn't measure the reference clock waveform (my hardware required me to remove the network card to measure the waveform), but the PCIe output did change, at least...

The readl_poll_timeout passed, so I should be able to guarantee that reset is at a high level.