hi all, hope you can help me due we are out of ideas...
We have a custom board with a PN5190B1HN/C121E (host: CC1352 MCU over SPI). A new production lot of ~100 units shows a ~75% failure rate: the device stops responding on SPI the moment the RF field is switched on for the first time, and only recovers after a VEN reset. Units from the previous lot (prototypes 5 pcs), same design and BOM, work correctly. We have ruled out antenna/matching, TX short, static supply, SYS3V brownout, chip FW and silicon lot with measurements. We are looking for the confirmed root cause, a possible silicon erratum, or an EEPROM/power configuration we may be missing.
Hardware
- NFC frontend: PN5190B1HN/C121E — GetVersion reports HW=0x52, ROM=0x02, FW=0x0201.
- TX supply = internal TX_LDO. VUP_TX (pin 6) = 3.3 V (LDO input). VDDPA (pin 9) = TX_LDO output (decoupled to GND only). VBAT / VBATPWR = 3.3 V. Internal DC-DC not used (no BOOST_LX inductor fitted).
- Main rail SYS3V = 3.3 V from a TPS62840 buck (0.7 A max).
- 27.12 MHz crystal (Murata XRCGB27M120F3M00R0).
- DPC disabled. ULPCD (ultra-low-power card detection) used. VDDPA set to minimum (TX_LDO_VDDPA_HIGH/LOW, EE 0x06/0x07 = 0x00).
- Differential antenna TX1/TX2, EMC filter (L = 160 nH) + matching. Measured resonance ≈ 12.56 MHz (with no final metallic enviroment)(identical on good and bad units).
Symptom (precise characterization)
- Full SPI works before field ON: SWITCH_MODE_NORMAL, GetVersion, GetDieId, EEPROM read/write all return SUCCESS (status 0x0000).
- On the first FieldOn (RF_ON) the host times out waiting for the field-on event. Immediately after, every SPI register read times out (reading CLIF_STATUS, SYSTEM_CONFIG, GetDieId all return a HAL IO timeout). The chip is completely unresponsive on SPI until a VEN reset.
- After a VEN reset the chip is healthy again (GetVersion OK), then FieldOn corrupts it again → endless retry loop.
- No RF field is radiated (NFC test LEDs do not light). Board draws ~20 mA and never returns to low power.
- Good vs bad units are identical in FW (0x0201), DIEID lot, EEPROM config, antenna (VNA) and DC resistances. The only difference is that bad units get corrupted on FieldOn.
- The host MCU stays alive during the hang (the I²C keypad expander keeps responding), so it is specifically the PN5190 that dies, not the whole board.
- Good vs bad current draw is identical up to ~2.7 s; at ~2.7 s the good unit completes and drops to low power, the bad unit stays stuck at ~20 mA.
Ruled out (each with a measurement, not intuition)
Hypothesis How it was excluded
| Antenna / matching / tuning | miniVNA on 4 good + 4 bad units → indistinguishable: resonance good 12.565 MHz / bad 12.593 MHz, RL ≈ −9 dB, |Z| ≈ 24.7 Ω, SWR ≈ 2.08 on both |
| TX short / overcurrent | DC resistance TX1–TX2 ≈ 1.2 kΩ, TX1–GND ≈ TX2–GND ≈ 1.15 kΩ, identical good vs bad |
| Static supply leak / decoupling | Current draw identical good vs bad until ~2.7 s |
| SYS3V brownout | Measured stable at 3.3 V; added 47 µF bulk on all 3.3 V rails → no change, still fails |
| Chip FW | Updated a unit to the latest PN5190 firmware → still fails, same behaviour. (Untouched good and bad units both report FW 0x0201.) |
| Silicon lot | DIEID good 00000000 0DD0945E 5B38BDDC 892C0810 vs bad 00000000 0DD095A6 6938BDDC 892C0E64 — same prefix/lot structure |
| TX driver amplitude | Reduced CLIF_SS_TX1/2_RMCFG CW amplitude before FieldOn → no change |
| TX_LDO overcurrent protection | Disabled it via TX_LDO_CONFIG bit 11 (0xAE → 0xA6) → no change |
| TX_LDO output capacitor | Removed VDDPA output caps (4.7 µF + 100 pF) → no change |
EEPROM configuration (identical on good and bad units)
- DCDC_PWR_CONFIG (0x00) = 0x21 (DC-DC off, VUP = VBATPWR, ULPCD enabled)
- TX_LDO_CONFIG (0x02 / 0x03) = 0xA7 / 0xAE (default)
- TX_LDO_VDDPA_HIGH / LOW (0x06 / 0x07) = 0x00 (minimum, ≈ 1.5 V)
- DPC disabled
Questions
- This matches the reported "PN5190 chip corruption during the first start / first RF field ON." Can you confirm the root cause and the definitive fix? (Note: flashing a unit with the latest PN5190 firmware did not resolve it — same failure.)
- Is there a silicon erratum for this lot / date code? We can provide the full DIEID and a photo of the chip marking.
- For our topology (internal TX_LDO, VUP_TX = 3.3 V, VDDPA = LDO output, DC-DC off, DPC off, ULPCD, VDDPA at the minimum 1.5 V): is this configuration valid? Is running VDDPA at the minimum a problem, and what is the correct EEPROM power configuration we should compare against (vs the PNEV5190B)?
- Is there a power-up sequencing requirement (VEN vs supply ramp) that would cause this if violated? Note: vs the previous (working) lot we moved VEN from an I²C expander output to a direct MCU GPIO, and the VEN pull-up is DNP, so VEN floats during host boot.
- With brownout, overcurrent, FW, silicon and antenna all excluded by measurement, what else in the RF_ON path can make the chip stop answering SPI until a VEN reset?
Thanks in advance ,
Ignacio