Hi nxp technical team,
I would like to know the default attributes of SRAM when the MPU of the S32K chip is not enabled? Specifically, what are the attributes of "share" and "cache" in the SRAM default settings?
I have consulted the ARMv7-m architecture reference manual, which indicates that the device type of SRAM is "device", seemingly meaning that the entire SRAM is sharable and non-cacheable. See the following picture.
Returning to my project, the project using MWCT2016s (i.e. S32K312) has abnormal HSE function when the MPU is not enabled, and it is necessary to configure MPU to set the SRAM area as sharable and non-cacheable. However, in the project using S32K322, the HSE function is normal when the MPU is not enabled.
Therefore, I would like to know the SRAM attributes of the S32K chip when the MPU is not enabled, or if there are any other settings that affect the SRAM attributes and thereby cause the differences between the two projects?
Hi @Johnson97,
It uses the default memory map:
"When the ENABLE bit is set to 0, the system uses the default memory map. This has the same memory attributes as if the MPU is not implemented, see Table 2.11. The default memory map applies to accesses from both privileged and unprivileged software."
As you can see in Table 2.11 and Table 2.12, the memory type for SRAM is Normal, Non-shareable, WBWA.
Regards,
Daniel