Dear NXP support team,
While working with custom board with MX RT1172, while capturing waveforms of DCDC_ANA_SENSE, we found initial ramp to 1.9V then it stabilises at 1.51V.
Could you tell why this is happening, I have attached waveforms and schematic for your reference.
Looking forward to hearing from you.
Regards,
Deep
Hi @deeporbit ,
Thank you so much for your interest in our products and for using our community.
Based on the waveform provided, the steady-state voltage of VOUT_DCDC_1V8 ( DCDC_ANA_SENSE) is approximately 1.51 V, which does not match the expected behavior. On the MIMXRT1170-EVKB, I test and found the DCDC_1V8_OUT rail regulates at approximately 1.8 V.
I would recommend checking the following:
1： Confirm that DCDC_ANA_SENSE is correctly connected to VOUT_DCDC_1V8 , and check whether the 0-Ω feedback resistor R166 is properly populated and soldered.
2： Check whether any external 1.8 V regulator, peripheral, level shifter, or other power domain is connected to the VDD_1V8 / VOUT_DCDC_1V8 rail and may be pulling or back-driving the rail.
3： Check the total load connected to DCDC_ANA / VOUT_DCDC_1V8 . The load on DCDC_ANA must not exceed its specified output capability of 150 mA.
4: If possible, isolate the downstream 1.8 V loads and measure VOUT_DCDC_1V8 again. If the rail returns to around 1.8 V after isolation, the issue is likely related to excessive load or an external circuit connected to the 1.8 V rail.
Best regards,
May