Hello NXP Support Team,
I am currently reviewing the MRF300AN 27MHz reference design and have a question regarding capacitor C16 on the output side.
According to the BOM I have (e.g., from the Farnell datasheet), C16 is specified as a 39,000 pF (39 nF) / 50V chip capacitor (ATC part 200B393KT50XT). Given that the MRF300AN operates at a 50V drain voltage and the output stage handles high RF power (up to 300W+), I am concerned that a 50V-rated capacitor in this position might be insufficient for reliable long-term operation.
My questions are:
Is the 50V rating for C16 in the BOM correct, or could it be a typo?
What is the exact function of C16 in this circuit? Is it part of the output matching network, a DC blocking capacitor, or a bypass/decoupling capacitor?
If it is indeed a DC blocking or matching capacitor in the RF output path, wouldn't a higher voltage rating (e.g., 100V or higher) be more appropriate to handle voltage transients and standing waves?
I would greatly appreciate your clarification on this matter. Thank you for your time and support.
Best regards,
Hello fengyuqi
Good day!
The 300W does not directly determine the voltage stress on a capacitor.
The capacitor voltage rating must be compared against the actual RF voltage across that capacitor, not against the amplifier output power.
C16 is not necessarily seeing the full RF output voltage.
From the reference design BOM, C16 belongs to the supply decoupling / RF bypass network, not directly across the 50 Ω output connector
I hope this information has helped you, please let me know if you need help with anything else.
Have a great day and best of luck.
Thank you for your detailed and helpful response. I truly appreciate the time you took to explain the voltage stress consideration on capacitors.
I would like to acknowledge that you are absolutely right — the voltage across C16 is not as high as the full RF output voltage, since the voltage stress depends on the actual RF voltage across the component rather than the amplifier's output power. I fully accept this point.
However, I would like to clarify one thing regarding C16. After double-checking the PCB layout I have, C16 does appear to be the DC blocking capacitor placed before the RF output, assuming all traces are routed on the top layer. I understand this might differ from the BOM's designation in your documentation, but based on the layout files I currently have access to, this is what I observe.
The materials I have downloaded so far include only the PCB layout files and a brief summary document — I do not have access to the full schematic, detailed BOM with component functions, or the complete reference design user guide.
Would it be possible for you to share more detailed documentation for this reference design, such as:
The full schematic
The complete BOM with component function descriptions
The reference design user manual or application note
I would be extremely grateful for any additional materials you could provide. If there are any restrictions on sharing these files, please also let me know so I can request them through the proper channel.
Thank you again for your guidance, and I look forward to your reply.
Best regards,
fengyuqi
Hello fengyuqi
Good day!
Unfortunately NXP documentation pack for this design does not include a schematic. It is our general practice since most RF designs are sensitive to board layout. Thus, the layout view plus BOM provides more reproducible results than a pure schematic. If you need, you can draw the schematic by yourself using layout and BOM.
Unfortunately we do not have a reference design for MRF300 in the 27MHz band.
The documentation we can recommend is that found on our official website in the "Design Resources" section:
However, this design has been implemented for quite a few years, so I can assure you that the BOM listed in the documentation we provide is correct.
I hope this information has helped you, please let me know if you need help with anything else.
We apologize for any inconvenience this may cause you.
Have a great day and best of luck.
Thank you very much for your previous reply and for sharing the design resources. I have reviewed the layout and BOM as you suggested, and I am now preparing to build my own prototype. Before I proceed, I would like to ask a few specific questions regarding component selection and potential modifications:
Capacitor substitution – Some ATC capacitors listed in the BOM are difficult to source in my region. I am considering using Vishay RF capacitors with similar key specifications, for example, 39 pF, C0G/NP0 dielectric, and the same voltage rating. In your experience, would this be a safe replacement, provided that other parameters like ESR, Q factor, and self‑resonant frequency are comparable? Are there any additional hidden characteristics I should pay extra attention to?
Value change for C10 – In my ADS simulation, I found that replacing C10 with a 200 pF capacitor gives a noticeable improvement in efficiency. Would you recommend making this change on the actual board? If so, are there any stability or thermal concerns I should evaluate before doing so?
Debugging approach – Since the schematic is not provided, I plan to use the layout and BOM as my primary references. I assume that minor discrepancies in my understanding of the circuit can be resolved through practical tuning and measurements on the prototype. Is this a reasonable approach in your view, or do you foresee any major risks?
I truly appreciate your time and guidance. Please feel free to let me know if any of these questions need further clarification.
Have a great day and best regards,
fengyuqi
Hello fengyuqi
Good day!
Capacitor substitution
Unfortunately, NXP doesn't have any recommended replacements, and I haven't had the opportunity to experiment with components other than those listed in the BOOM, so we can't guarantee their functionality.
However, based on my research, the replacements sound feasible, only if the parameters you mentioned earlier are equivalent. I would also consider the package geometry and heat dissipation, if possible.
Value change for C10
Go ahead if you've already run the simulation and see improvement, continue.
Debugging approach
Sure, I think it's a good approach; often, small errors can be fixed by making minor modifications to the layout, so I don't see any risk in doing it this way.
I hope this information has helped you, please let me know if you need help with anything else.
Have a great day and best of luck.