2394416_en-US

[#1]

i.MX 8M Plus LPDDR4 EVK - enabling eMMC boot0/boot1

Board: i.MX 8M Plus LPDDR4 EVK (MIMX8ML8DVNLZAA), IMX8MPEVKHUG rev 0
HAB: fused OPEN (SRK not burned, deliberately, still evaluating)

I am implementing bootloader-update redundancy for a RAUC-based A/B update system and want to use the eMMC's hardware boot0/boot1 partitions (BOOT_PARTITION_ENABLE) the way many i.MX8M designs do — write the new bootloader to the inactive boot partition, flip which one is active, and rely on the ROM to fall back to the other if the newly-active one fails. I specifically want to avoid burning any BOOT_CFG/efuses for this.

What I have observed on the EVK, using mmc-utils built from the poky/oe-core mmc-utils recipe:

- mmc extcsd read /dev/mmcblk2 reports PARTITION_CONFIG with BOOT_PARTITION_ENABLE already set to boot0 (value 0x08).
- boot0 (/dev/mmcblk2boot0) contains a valid-looking image (correct IVT tag at offset 0), but it does not match my currently deployed bootloader.
- boot1 (/dev/mmcblk2boot1) is completely empty (all zero).
- A byte-exact comparison confirms the board is actually booting from the raw eMMC user area at the standard 32 KiB offset (content matches my currently deployed imx-boot exactly) — not from boot0, despite PARTITION_CONFIG indicating boot0 is enabled.

So on this board, EXT_CSD's BOOT_PARTITION_ENABLE appears to have no effect on the ROM's actual boot source. Per IMX8MPEVKHUG section 2.2, the EVK's SW4 switch only selects the coarse boot device class (eMMC vs SD vs QSPI vs NAND vs fuses vs USB serial download) — there is no switch position for the eMMC boot-partition sub-mode.

Questions:

1. Is there a supported way to select "ROM boots from eMMC boot0/boot1 hardware partition" on the LPDDR4 EVK specifically, without setting BT_FUSE_SEL=1 / burning BOOT_CFG efuses — e.g. a jumper, resistor option, or alternate SW4/SW1101 combination not documented in IMX8MPEVKHUG rev 0? Or is this hard-strapped on this board's PCB to always boot from the eMMC user area regardless of EXT_CSD state?

2. If BOOT_CFG efuses are the only way to enable eMMC boot-partition mode: are the BOOT_CFG fuse banks that control this independent of the SRK-hash fuses used for HAB? I want to understand whether enabling eMMC boot-partition redundancy via fuses would force me to also commit to closing HAB (SRK burn) at the same time, or whether these are separable decisions.

3. For a custom board design (not the EVK) using the i.MX 8M Plus with eMMC, what is the recommended way to make eMMC boot0/boot1 redundancy available from first bring-up — i.e., what needs to be true in the BOOT_CFG GPIO strapping / PCB design so this is a day-one option rather than something that requires a later fuse commitment?

Any pointers to the specific Reference Manual section covering the BOOT_CFG bit definitions for eMMC boot-partition selection (beyond the SW4 device-class bits already covered in IMX8MPEVKHUG) would also be appreciated.

Thank you!

Re: i.MX 8M Plus LPDDR4 EVK - enabling eMMC boot0/boot1

FYI for i.Mx8 UM at chapter 5.8.2.2.1 High Level eMMC Boot Flow
The SCU ROM supports 4 eMMC boot scenarios:
1. In this scenario, the "eMMC fast boot" fuse is blown. The primary and secondary
image container set are both in the boot partitions, and BOOT_PARTITION_ENABLE = 1 or 2.
2. In this scenario, the "eMMC fast boot" fuse is blown. The primary and secondary
image container set are both in the User Area, and BOOT_PARTITION_ENABLE =7.
3. In this scenario, the "eMMC fast boot" fuse is not blown. The boot mode is Normal
Boot, and the primary and secondary image container set are both in the User Area.
4. In this scenario, the "eMMC fast boot" fuse is not blown. The boot mode is Normal
Boot, and the primary and secondary image container set are both in the boot
partitions, and BOOT_PARTITION_ENABLE = 1 or 2.