2394369_en-US

[#1]

MCXN547: SWD DP ID is readable, but AP0/AP2 access returns WIRE ACK FAULT

Hello NXP Support,

We are using an MCXN547VKLT on a custom board with an external MCU-Link probe.

The SWD connection fails when starting a debug session:

Ee(42). Could not connect to core.
Et:31: No connection to chip's debug port.
Remote connection closed.

The SWD-DP can be detected correctly:

DPID = 0x6BA02477

However, access to CPU0 AHB-AP (AP0) fails with:

WIRE ACK FAULT

The Debug Mailbox request also fails. LinkServer reports:

DM-AP status: 60F93638
DM-AP: AHB_OR_ERR
DM-AP: DBG_OR_ERR

What we have checked:

• SWD frequency tested from 1 MHz down to 10 kHz
• SWDIO and SWCLK waveforms look good on an oscilloscope
• VDD_CORE = 1.2 V
• VDD_SYS = 1.8 V
• VDD_DCDC and I/O supplies = 3.3 V
• RESET_B works correctly
• MCU-Link firmware: CMSIS-DAP V3.172
• LinkServer version: 26.5.59
• The same MCU-Link works with an MCXN947 development board
• The MCXN547 was replaced with a new chip, but the problem remains

USB ISP works correctly with VID/PID 1FC9:014F. Using blhost, we can:

• Erase internal Flash
• Program and read internal Flash
• Run the application successfully
• Enumerate the application USB composite device

The ROM reports:

Security State = UNSECURE

We also read the PFR through USB ISP:

• CMPA is completely erased (0xFF)
• CFPA is erased except for the ROM-generated CMAC
• No customer SOCU or Debug Authentication configuration is present

Could you please advise:

1. What conditions are required before AP0 and AP2 become accessible?
2. Is DM-AP status 0x60F93638 associated with a known power, reset, or hardware configuration issue?
3. Are there any known MCXN547 errata related to SWD or Debug Mailbox access?
4. Which power and reset signals should we check for this symptom?

MCXN