Hi NXP Team,
We are designing an i.MX8M Plus-based SOM with two Ethernet PHYs. Currently, each PHY has a dedicated interrupt GPIO connected to the i.MX8M Plus.
We need clarification on the following:
Our intention is to free one GPIO and use it for an ADC data-ready interrupt.
Hello @Sudharsun
Hope you are doing very well.
What are the main software use cases of the Ethernet PHY interrupt pins? Are they mainly used for link up/down, auto-negotiation, speed/duplex change, and Wake-on-LAN events?
Ethernet PHY interrupt pins are mainly used for PHY event notification such as link up/down, auto-negotiation, speed/duplex changes, and optional Wake-on-LAN events.
Normal Ethernet data traffic does not depend on the interrupt pin. If a PHY interrupt is not provided, Linux PHYLIB can operate the PHY in polling mode.
Can both Ethernet PHY interrupt outputs be combined and connected to a single i.MX8M Plus GPIO, with software reading both PHY status registers through MDIO to identify the interrupt source?
Combining two PHY interrupt outputs into one GPIO may be possible but the safer design is to use polling for one PHY and reserve the GPIO for your ADC DRDY.
Will using PHY polling affect normal Ethernet data communication, apart from a small delay in detecting link-status changes?
Using polling should not affect normal Ethernet communication or throughput.
Best regards,
Salas.