I'm evaluating the ARA240 M.2 accelerator on the i.MX95 FRDM.
The runtime is working correctly:
However, I would like to deploy my own MobileNet model, and I'm unable to find the toolchain required to compile models into the .dvm format.
My questions are:
Any guidance or documentation would be greatly appreciated.
Thanks!
For CNN model,Ara2 Runtime Package could be helpful which can downloaded from the official website
Provides a runtime environment for Ara240.Provides scripts to download and run pre-compiled CNN and GenAI models on Ara240 modules. For your question, please refer to the AI generated answer as below, hope it helps
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First, critical background:
ARA240 (formerly Kinara Ara-2) .dvm = Kinara DNN Virtual Machine binary model, proprietary compiled graph format for this DNPU.
rt-sdk-ara2 (target runtime + DVAPI) ≠ compiler toolchain.
You have only the inference runtime installed on i.MX95; the offline model compiler is separate software.
1. Supported workflow: ONNX / TFLite → .dvm
Official end-to-end flow:
PyTorch/TensorFlow → ONNX / TFLite
→ Ara2 Offline Compiler (dvconvert / dvnc, Ara2 Converter)
→ Quantization (int8 preferred for CNN like MobileNet)
→ Optimized .dvm binary
→ Deploy .dvm to i.MX95 FRDM
→ Load & run via DVAPI / nnapp / libaraclient over PCIe to ARA240
Important constraint: Compilation cannot run on the i.MX95 target board.
The compiler is a host-side Linux x86_64 toolchain, executed on an external PC/workstation.
2. Is dvconvert / Ara2 Converter public?
NO. The converter is NOT publicly downloadable.
The rt-sdk-ara2 Debian packages hosted on NXP GitHub only contain target runtime, DVAPI Python bindings, prebuilt demo .dvm models. No compiler binaries included.
The Ara2 compiler suite (dvconvert, dvnc) is distributed separately under NXP restricted software access.
This toolchain originated from Kinara; after NXP acquired Kinara, access is managed via NXP sales / CAS (Customer Application Support).
3. Is there an official NXP-supported path to deploy custom CNN (MobileNet)?
Yes, but you need to formally request access to the Ara SDK compiler:
Official route to obtain the converter
Contact your local NXP FAE / NXP CAS support ticket referencing:
Hardware: FRDM i.MX95 + ARA240 M.2 DNPU
Request: Access to Ara SDK offline model compiler (dvconvert) for custom ONNX/TFLite CNN compilation to .dvm
You will need to sign NXP’s software license agreement for restricted Ara tooling.
NXP originally planned wider release alongside updated eIQ Toolkit (previously scheduled mid-2026); at present, it remains gated to supported evaluation customers.
Workarounds & alternatives while waiting for tool access
You cannot generate custom .dvm locally without dvconvert. There is no open-source third-party converter for ARA240 .dvm.
Option A: Ask NXP engineering support to perform model compilation as part of your early access evaluation.
Option B: Split workload temporarily: run uncompiled ONNX via CPU/Neutron NPU on i.MX95 onboard eIQ Neutron while waiting for Ara compiler access (this does not offload to ARA240).
Note: Do not confuse i.MX95’s built-in Neutron NPU (.neutron model) with external ARA240 DNPU (.dvm). They use completely incompatible binary formats.
4. Key pitfalls to avoid
There is no Paddle2ONNX / ONNX converter utility inside rt-sdk-ara2.
Prebuilt demo .dvm files distributed with the SDK cannot be reverse-engineered to extract conversion logic.
No web-based model converter available for ARA240 today.
MobileNet v1/v2 are fully supported architectures by dvconvert once you receive the toolchain; ensure ONNX is cleaned (remove unused nodes, fixed input shape, standard ops only).
Suggested wording you can directly send to NXP support ticket
We are evaluating ARA240 M.2 module on FRDM i.MX95. PCIe enumeration, provided sample .dvm execution, rt-sdk-ara2 and DVAPI are functional. We require access to the Ara2 offline compiler (dvconvert/dvnc) to compile custom MobileNet ONNX models into .dvm binaries. Please share procedure to obtain the host-side Ara SDK model conversion toolchain.