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We plan to use UART communication on the NXP i.MX6 (Cortex-A9) at baud rates of 230.4 kbps or 460.8 kbps.
According to the following resolved thread,
Solved: Re: how to enhance uart baud rate for imx6 - NXP Community
it is stated that at baud rates higher than 115.2 kbps, the processor seemed can't receive all bytes timely and the kernel returns "Rx FIFO overrun" random.
To solve this matter, two ways are suggested:
- Modify the driver code to enable DMA transfer
- Increase the buffer of DMA receive which above of bytes per frame
I have two questions. (The second one is optional.)
① Could you tell me the specific procedure to modify the driver code to enable DMA transfer?
② If there is any information regarding the error rate when operating under the above conditions, we would appreciate it if you could share that as well.
HI @INOUE,
Thank you for contacting NXP Support!
Unfortunately, we do not have any documentation or application note that describes this procedure.
You will need to implement and validate it on your own based on the information provided in the Reference Manual.
Please refer to the RM for the hardware details, register descriptions, and recommended programming sequence.
Best regards,
Chavira