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2387350_en-US
2387350_en-US
NXP Team,
Do you have a MCXA265VPN fanout example? Need recommended via pad and hole size. Are the vias in pads or between pins? Need to have a solid GND plane under BGA?
Please help.
Thanks Dan Rogers
Team,
Do you have a demo board with suggested routing? I need to know:
Trace widths sizes used to route between BGA pins?
Via types used and pad sizes with hole size?
- thru hole, bbvia, stacked?
Spacings used between pins after routing?
DESCRIPTION = MCXA265VPN, NXP SEMICONDUCTORS
MXCA_169_BGA169 (10 mil pads with 19.7 mil pitch between pins)
Thank you very much. for your support.
Dan Rogers
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