2387348_en-US

[#1]

MCXA153: LPSPI data burst transfer.

Hello,

The Reference Manual MCXA153 contains a description of the TDBRn and RDBRn LPSPI registers:
"TDBRn and RDBRn registers supports burst transfers of data to the transmit FIFO for use with the DMA controller".
Can anyone share sample code for a burst transfer using these registers?

best regards
Bogdan

Communication & Control(I3C | I2C | SPI | FlexCAN | Ethernet | FlexIO)MCXARe: MCXA153: LPSPI data burst transfer.

Hi @bogdan_u 

Sorry, there are currently no relevant examples available.

The closest MCXA153 example I found uses LPSPI_MasterTransferEDMALite() with eDMA, but the driver targets TDR/RDR via LPSPI_GetTxRegisterAddress() / LPSPI_GetRxRegisterAddress() , not the burst alias window.

But i think you can try to use.

typedef struct
{
    uint32_t cmd;          
    uint32_t data[128];    
} lpspi_burst_tx_t;

static inline uint32_t LPSPI_TCBR_Address(LPSPI_Type *base)
{
    return ((uint32_t)base + LPSPI_TCBR_OFFSET);
}

static inline uint32_t LPSPI_TDBR0_Address(LPSPI_Type *base)
{
    return ((uint32_t)base + LPSPI_TDBR0_OFFSET);
}

static inline uint32_t LPSPI_RDBR0_Address(LPSPI_Type *base)
{
    return ((uint32_t)base + LPSPI_RDBR0_OFFSET);
}

void LPSPI_StartTxBurstDMA(LPSPI_Type *base,
                           edma_handle_t *txDmaHandle,
                           uint32_t *cmd_plus_data,
                           uint32_t nwords)
{
    edma_transfer_config_t cfg = {0};

    cfg.srcAddr           = (uint32_t)&cmd_plus_data[0];
    cfg.destAddr          = LPSPI_TCBR_Address(base);
    cfg.srcOffset         = 4;
    cfg.destOffset        = 4;
    cfg.srcTransferSize   = kEDMA_TransferSize4Bytes;
    cfg.destTransferSize  = kEDMA_TransferSize4Bytes;
    cfg.minorLoopBytes    = 4;
    cfg.majorLoopCounts   = nwords + 1u;

    EDMA_ResetChannel(txDmaHandle->base, txDmaHandle->channel);
    EDMA_SetTransferConfig(txDmaHandle->base, txDmaHandle->channel, &cfg, NULL);

    EDMA_StartTransfer(txDmaHandle);
    LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable);
}


void LPSPI_StartRxBurstDMA(LPSPI_Type *base,
                           edma_handle_t *rxDmaHandle,
                           uint32_t *rx_words,
                           uint32_t nwords)
{
    edma_transfer_config_t cfg = {0};

    cfg.srcAddr           = LPSPI_RDBR0_Address(base);
    cfg.destAddr          = (uint32_t)&rx_words[0];
    cfg.srcOffset         = 4;
    cfg.destOffset        = 4;
    cfg.srcTransferSize   = kEDMA_TransferSize4Bytes;
    cfg.destTransferSize  = kEDMA_TransferSize4Bytes;
    cfg.minorLoopBytes    = 4;
    cfg.majorLoopCounts   = nwords;

    EDMA_ResetChannel(rxDmaHandle->base, rxDmaHandle->channel);
    EDMA_SetTransferConfig(rxDmaHandle->base, rxDmaHandle->channel, &cfg, NULL);

    EDMA_StartTransfer(rxDmaHandle);
    LPSPI_EnableDMA(base, kLPSPI_RxDmaEnable);
}

BR

Harry