We use Toradex's Veridin i.MX8Mplus at our company.
At that time, the SOM_PW_ON signal is input to control the SoM's power supply. (Directly connected to the ON/OFF signal of the i.mx8MPlusSoC). *Please refer to the waveform on the attached oscilloscope.
Due to the circuit configuration on the SoM side, the voltage should be High (1.8V), but for about 800 msec after startup, it remains at an intermediate potential of approximately 0.3-0.4V.
I'd like to know how this voltage (0.3 to 0.4V) is handled as an ON/OFF signal on the SoC side.
This information was not included in the datasheet or reference manual.
I think that in cases of very short ON/OFF operations (<5s), the system may proceed to shutdown. Would the operation detection criteria be the transition from High to Low edge state and the duration of the Low state?
I would also like to know the exact minimum/maximum times for those times.
For i.MX8M Plus, ONOFF is handled as a level-held button input with configurable 0/50/100/500 ms qualification and 5/10/15 s forced-off timing, and your observed 0.3–0.4 V on a 1.8 V ONOFF net is most consistently interpreted as logic Low by the available input-threshold documentation.
Thank you for your reply.
The observed V values of 0.3–0.41.8V on the ONOFF network are most consistently interpreted as logically low by the available input threshold documentation.
By the way, could you also tell me about the voltage threshold that is interpreted as logically low?
Furthermore, if interpreted as logically low, the ON/OFF state will remain logically low for approximately 800 msec after startup before changing to logically high.
In that case, would it be considered that a button input occurred?
My concern is whether a button press might cause the system to automatically shut down immediately after startup.
I apologize. I would like to know the voltage threshold at which the logic value is interpreted.
Thank you for your reply.
The observed V values of 0.3–0.41.8V on the ONOFF network are most consistently interpreted as logically low by the available input threshold documentation.
By the way, could you also tell me about the voltage threshold that is interpreted as the logical high?
Furthermore, if interpreted as logically low, the ON/OFF state will remain logically low for approximately 800 msec after startup before changing to logically high.
In that case, would it be considered that a button input occurred?
My concern is whether a button press might cause the system to automatically shut down immediately after startup.
To the NXP TechSupport representative
What do you think about this matter?
I have one more question:
ON/OFF is processed as a level hold button input, with conditions of 0/50/100/500 ms.
Regarding that point, I believe the default is 0. In this case, if the level momentarily exceeds the logical high or logical low threshold due to noise or other factors, will the level be held?
I am concerned that with this default setting, if noise is received, there is a possibility of malfunction if something that causes a logic judgment opposite to the currently held level logic is introduced, even for a moment.
I have added a few more questions.
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Thank you for your assistance.
This is Mori from Pal Giken.
It's been almost a week now, how is the response going?
Thank you for your cooperation.
I apologize for the inconvenience, but could you please answer this question as well?
Please provide an answer to the question I asked.
Thank you for your reply.
What I wanted to ask with this question is
The question is whether a button input is recognized when the ONOFF pin is in a logically low state during startup.
Our verification
One observed behavior was that when the ONOFF pin started in a logically high state and then transitioned to a logically low state 10ms to 20ms later, the system would immediately shut down after startup.
When the system is started in a logically low state, no cases have been observed where it immediately proceeds to shutdown after startup.
For i.MX8MP, the ONOFF pin belongs to the NVCC_SNVS power group and is listed as a GPIO-type input with reset state “Input with PU” . The applicable GPIO DC input-low specification is:
VIL(max)=0.3×VDD
with the table specifying low-level input voltage as min = -0.3 V, max = 0.3 × VDD .
Therefore, if ONOFF is powered from a 1.8 V SNVS I/O domain , the guaranteed logic-low threshold is:
0.3×1.8 V=0.54 V
So an observed ONOFF voltage of approximately 0.3–0.4 V would be interpreted as logic low .
Regarding whether this would be considered a button input: yes, if the ONOFF pin remains low long enough after the device is in ON mode, it can be treated as a valid ONOFF button event.
- An 800 ms low level can be recognized as a normal ONOFF button event , because it exceeds the configured normal button debounce duration.
- It should not directly trigger the hardware emergency forced shutdown , because that requires about 5 seconds .
- Whether the system shuts down immediately after startup depends on the software/PMIC handling of the normal ONOFF event. In ON mode, a brief connection to GND generates an interrupt intended to initiate a software-controllable power-down. If the boot software or OS power-key handler treats that interrupt as a power-off request, then an unintended shutdown after startup is possible.
The question is whether a button input is recognized when the ONOFF pin is in a logically low state during startup.
What are your thoughts on this question?