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S32K312 - SPI actual clock frequency/period discrepancy with Baudrate configuration

Hi,

I am currently developing a project using the S32K312 MCU.

I have configured the SPI module as shown below, but the measured clock period does not match the configured Baudrate.

  • Configured Baudrate: 1,500,000 bps (1.5 Mbps)

  • Expected Clock Period: ~0.667 us

  • Measured Clock Period: 1.320 us (Equivalent to approx. 757.58 kbps)

As shown in the attached oscilloscope screenshot, the △T between the clock edges is 1.320 us, which is nearly half the speed of my target baudrate.

Could you please guide me on what might be causing this discrepancy? (e.g., peripheral clock divider settings, protocol clock configuration, or specific register settings in the S32K3 SPI module).

Any advice or check-lists would be greatly appreciated.

Thank you in advance!


ssean_0-1781484644582.png

ssean_1-1781484662666.png


Re: S32K312 - SPI actual clock frequency/period discrepancy with Baudrate configuration

@Robin_Shen 

I have fixed the issue by changing the clock settings. Thank you so much for your help!


Re: S32K312 - SPI actual clock frequency/period discrepancy with Baudrate configuration

Hi

Did you configure the SpiPhyUnit -> SpiPhyUnitClockRef according to the "24.6.1.1.5 LPSPIn clocking" of S32K3XXRM Rev12? 

The LPSPI0 of S32K312 should select: /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/AIPS_PLAT_CLK
The LPSPI1\2\3 of S32K312 should select:
/Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/AIPS_SLOW_CLK


Best Regards,
Robin
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Re: S32K312 - SPI actual clock frequency/period discrepancy with Baudrate configuration

Can you upload the full SPI waveform including CS, CLK, MISO and MOSI?

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Last update:
‎06-16-2026 03:30 AM
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