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S32Z2: Cortex M33: DWT Cycle counter only working when the debugger is connected

Hi,

I am working on a custom hardware with S32Z2  series controller.
I am trying to use the DWT cycle counter on the ARM Cortex M33 core for measuring CPU cycles.

I am facing a strange issue:
My DWT cycle timer code only works when I am running the code in debug mode (actively debugging). The same piece of code does not give DWT cycle counts when the code is freely running (NO debug session).

The stub of code for enabling DWT:

reg_ptr->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
reg_ptr->DWTLAR = 0xC5ACCE55U; 
reg_ptr->CYCCNT = 0; 
reg_ptr->CTRL |= DWT_CTRL_CYCCNTENA_Msk; 

Any pointers on what I may be doing wrong ?

Thanks in advance.

regards,

Re: S32Z2: Cortex M33: DWT Cycle counter only working when the debugger is connected

Hi @alejandro_e 

DWT is part of the Cortex M33 core. Information about it is accessible from ARM Technical reference. DWT is mentioned in the S32Z2  Reference Manual [Section: 26.2.2 - Parameter Settings] and DWT is also mentioned in the LLCE core section of the reference manua

We were able to make it work in the debug mode. The same code does not work in free running mode (without the debug session). As per my understanding it should work in both the cases. I want to make sure if NXP's S32Z280 silicon has limited the DWT is anyway.

Re: S32Z2: Cortex M33: DWT Cycle counter only working when the debugger is connected

Hello @pj0585,

I was not able to find any reference in our documentation on how to use the DWT cycle counter. Where did you find the information on the DWT registers?

Thanks.

Re: S32Z2: Cortex M33: DWT Cycle counter only working when the debugger is connected

Hello @pj0585,

Yes, you are correct, it is mentioned in section Section: 26.2.2 - Parameter Settings, but there is no reference on how to use it, and given that it is a core register, the details on how to use it are internal information not shared with customers. And, although the ARMs documentation is useful for this kind of topics, it is up to each vendor to implement the registers and behaviors as they see fit, in this case us, NXP. I apologize but I might not be able to help you much with the exact implementation you are requesting. However, if you share more details about the exact issue you want to overcome I might be able to help you with another implementation.

Regards.