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2371199_en-US

S32N55 HSE2 ADKP SetAttribute causes chip hang when OTP write - GCS custom board

- SoC: S32N55 (B0 silicon)
- GrayVIP: 1.0.24
- HSE2 FW: HSE_FW_S32N5_1_0_24_0
- Lifecycle: OEM_OPEN
- Board: Custom B/D (SGMII only, no RGMII)

EVB board:
- FSS/CRS normal operation
- ADKP SetAttribute success

Custom board issue:
- CRS_ETH0/1_RGMII_RX clock source not available
(no RGMII interface on board)
- Workaround applied: parent clock changed to CRS_SAFE
- After workaround: FSS/CRS normal, Secure Boot normal


After clock workaround applied on custom board,
HSE_OTP_FOEM_ADKP_ATTR_ID SetAttribute returns
HSE_SRV_RSP_NOT_ALLOWED (0xAA55A21C).

Following this failure, chip becomes unresponsive:
- T32 attach fails with bus error at AHB:0xE0042FE0
(CoreSight ROM Table)
- FSS cannot be attached via JTAG
- Board requires physical intervention to recover

Same ADKP provisioning code works correctly on EVB
without clock modification.

GetAttribute calls (HSE_OTP_LIFECYCLE_ATTR_ID,
HSE_OTP_FOEM_ADKP_ATTR_ID) work normally on
custom board, confirming basic HSE communication
is functional.


1. Can CRS_ETH0/1_RGMII_RX clock configuration
affect HSE OTP write operations?

2. Why does chip become unresponsive after
ADKP SetAttribute failure, and is there
a recovery method without board replacement?

3. Is there any known issue or restriction for
ADKP provisioning on custom boards with
modified CRS clock configuration in
HSE_FW_S32N5_1_0_24_0?

1. What conditions trigger HSE_SRV_RSP_NOT_ALLOWED
for HSE_OTP_FOEM_ADKP_ATTR_ID SetAttribute
when Lifecycle is confirmed OEM_OPEN?

2. Can CRS_ETH0/1_RGMII_RX clock configuration
affect HSE OTP write operations?

3. Why does chip become unresponsive after
ADKP SetAttribute failure, and is there
a recovery method without board replacement?

4. Is there any known issue or restriction for
ADKP provisioning on custom boards with
modified CRS clock configuration in
HSE_FW_S32N5_1_0_24_0?

Re: S32N55 HSE2 ADKP SetAttribute causes chip hang when OTP write - GCS custom board

Hello @EddiePark,

Sorry for the delay I was out of the office for a couple of days. I got notifications that you replied to my questions but it seems that you deleted those replies.

Do you still need support on this topic?


Thanks.

Re: S32N55 HSE2 ADKP SetAttribute causes chip hang when OTP write - GCS custom board

Hello again @EddiePark,

Thanks for reaching out to us again. For now I don't have answers for all your questions, I was not able to find any reference to indicate any correlation between the clocks you mentioned and the HSE.  Can you share the exact registers you modified for the clock changes? Also, if your board does not use a RGMII interface, why is this change needed?


Thanks.

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Last update:
‎05-30-2026 04:54 AM
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