2364799_en-US

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S32G2 HSE — Sharing NVM Key Catalog between M-core and A-core

Hello,

I am working on a key provisioning workflow on the S32G274A (RDB2 board)
where the M-core (Cortex-M7) and the A-core (Cortex-A53, running Linux BSP)
need to share the HSE NVM key catalog. I would like to confirm whether the
following scenario is supported.

== Intended Scenario ==

1. On the M-core (bare-metal application):
- Call HSE_FormatKeyCatalogs() to create the NVM/RAM key catalogs.
- Import an initial set of keys (e.g., 2 AES-128 keys) into NVM slots
using HSE_ImportKey().
- This step is intended as one-time provisioning.

2. On the A-core (Linux, via libhse / UIO HSE MU driver):
- Access the same HSE instance via a different MU channel (e.g., MU0).
- Use the keys provisioned by the M-core for runtime operations
(HMAC, AES encryption, etc.).
- Additionally, import further keys into the *same* NVM catalog
that was formatted by the M-core.

== Questions ==

Q1. Catalog visibility across cores:
Is a key catalog created by one core (e.g., M-core via MU3) visible
and usable by another core (e.g., A-core via MU0)?
Or does each MU instance have an isolated view of the catalog?

Q2. Cross-core key injection into the same catalog:
After the M-core has formatted the NVM catalog and imported keys,
can the A-core import additional keys into the *same* NVM key group
using HSE_ImportKey() through a different MU channel?
Are there any access-control restrictions (e.g., per-MU ownership,
SMR flags) that would prevent this?

Q3. Persistence and consistency:
After cross-core injection, do the keys persist correctly across
power cycles? Is there any risk of NVM corruption or inconsistency
when keys are written from different cores at different times?

Q4. Recommended design pattern:
If the intended scenario above is not directly supported, what is
the recommended pattern for the following use case?

- The M-core performs one-time provisioning (catalog format + initial keys).
- The A-core performs the actual runtime key management (additional
key imports, key updates, ECU key delivery) using the catalog
already created by the M-core.

== Environment ==

- Target: S32G274A on S32G-VNP-RDB2
- HSE Firmware: HSE_DEMOAPP_S32G2XX_0_2_86_0
- M-core: Cortex-M7_0, bare-metal, built with S32 Design Studio
- A-core: Cortex-A53, running NXP Linux BSP (with libhse and UIO HSE MU driver)
- MU assignment (current plan):
- M-core uses MU3 (or another available MU instance)
- A-core uses MU0

Any guidance, reference documentation, or sample code addressing this
multi-core HSE sharing scenario would be greatly appreciated.

Thank you in advance for your support.

we use bsp36

#hse, #s32g2, #multicore