Hi,nxp fellows:
We are currently debugging the SJA1110 and have encountered some issues. We would like to seek assistance.
We plan to connect to the network through the AG35 4G module and share the network with other devices using the SJA1110.
Our custom board uses the three ports of the SJA1110. Port 1 uses the 88Q2112-A2-NYD2A000 chip to convert SGMII to T1 network ports. Port 3 is connected to the SGMII port of the AG35 4G module, and Port 4 is connected to pfe1 of S32G.
We ran the SJA1110ECT_Release_1.4.0/server/rtd program on S32DS in the SJA1110, and all three ports are in SGMII mode.
S32G2 runs the BPS42 Linux system.
After S32G starts, it can ping SJA1110, but pinging Port 1 and Port 3 does not work.
Could you help us analyze the problem and give us some suggestions?
hello, @PavelL
When I was using the SJA1110ECT program, I made some simple modifications to the configurations of EthTrcv_43_PHY and EthSwt_43_SJA11XX. I uploaded the screenshots of the pages. Could you please confirm if they are correct?
In the S32G2 Linux system, I was able to ping 192.168.0.200 successfully, but when I checked it through arp, the displayed MAC address was different from the one in the page. It should have been fixed in the code.
root@s32g274ardb2:~# ping 192.168.0.200
PING 192.168.0.200 (192.168.0.200) 56(84) bytes of data.
64 bytes from 192.168.0.200: icmp_seq=1 ttl=255 time=1.06 ms
64 bytes from 192.168.0.200: icmp_seq=2 ttl=255 time=0.907 ms
^C
--- 192.168.0.200 ping statistics ---
2 packets transmitted, 2 received, 0% packet loss, time 1001ms
rtt min/avg/max/mdev = 0.907/0.983/1.059/0.076 ms
root@s32g274ardb2:~# arp
Address HWtype HWaddress Flags Mask Iface
192.168.0.200 ether 10:11:12:66:66:66 C pfe1
I used debug and saw the value of LINK_STS in the register. Could you elaborate on how to read each port SR_MII_STS and confirm that LINK_STS = 1 (link up)?
I haven't modified the MAC. Do I need to change each port to a different value?
Thanks.
Hello @zhipeng ,
Since your hardware differs from the reference design, I assume you updated:
- the PHY list in EthTrcv_43_PHY
- the PHY-to-port assignments in EthSwt_43_SJA11XX
For each port, please read SR_MII_STS and confirm that LINK_STS = 1 (link up).
Do all endpoints use unique MAC addresses?
Best regards,
Pavel
Hello @zhipeng ,
SGMII setup: I assume that AG35 expects connection to PHY, so SGMII port on SJA1110 shall be in PHY_MODE. Speed 1G, Full duplex and Autoneg off are the good starting points.
The displayed MAC address in ARP belongs to Eth driver (internal MAC - port 0 - connected to the internal M7), where tcpip_stack is connected.
You may use Switch_Ip_InternalRead() to read register value.
No, you don't have to modified MAC addresses for each port - end nodes need to have unique MAC addresses.
Best regards,
Pavel
Hello @zhipeng ,
I apologize, I forgot that SGMII uses indirect addressing. It's described:
- in UM11107 Software user manual for SJA1110, Rev. 3.0, chapter 8.3.11 Register access.
- and also in AN12925 SJA1110 software application notes, Rev. 1, chapter 4.1.6 Register access.
Best regards,
Pavel