2332831_en-US

[#1]

Idle line detect on IMX8

Hi,

I use an EVKIMX8MP board and I develop an application on M7 core with FreeRTOS using the SDK NXP 2.16.000.

I'm trying to use the UART1 on idle line detect mode thight with SDMA1 to retrieve complete frames.

I note that interrupt triggers only when the RX buffer is full, and not when the line is in « Idle » state

Do you have an example that explains how to use the idle line detect on RX line with SDMA, or there is a limitation ?

I tried to use the UART_IDLE_DETECT_SDMA_TRANSFER example from the UART example of the SDK but without sucess.

Best regards,

David

Re: Idle line detect on IMX8

Hi @David_Sailor 

How did you test it? Referring the readme in demo, the Uboot should be modified to run this demo.

#### Please note this application can't support booting by uboot! and accordingly it does not support Flash target! ####
This example aims to show the basic usage of the IP's function, some of the used Resources are assigned to Cortex-A core by uboot.

Please refer these lines in uboo-imx/arch/arm/dts/imx8mp-evk-u-boot.dtsi, try to assign SDMA1 to domain 1(M7).

	mcu_rdc {
		compatible = "imx8m,mcu_rdc";
			    /* rdc config when MCU starts
			     * master
			     *   SDMA3p --> domain 1
			     *   SDMA3b --> domian 1
			     *   SDMA3_SPBA2  --> domian 1
			     * peripheral:
			     *   SAI3   --> Only Domian 1 can access
			     *   UART4  --> Only Domian 1 can access
			     *   GPT1   --> Only Domian 1 can access
			     *   SDMA3  --> Only Domian 1 can access
			     *   I2C3   --> Only Domian 1 can access
			     * memory:
			     *   TCM    --> Only Domian 1 can access (0x7E0000~0x81FFFF)
			     *   DDR    --> Only Domian 1 can access (0x80000000~0x81000000)
			     * end.
			     */
		start-config = <
			    RDC_MDA  RDC_MDA_SDMA3p DID1 0x0 0x0
			    RDC_MDA  RDC_MDA_ENET1_TX DID1 0x0 0x0
			    RDC_MDA  RDC_MDA_ENET1_RX DID1 0x0 0x0
			    RDC_MDA  RDC_MDA_SDMA3b DID1 0x0 0x0
			    RDC_MDA  RDC_MDA_SDMA3_SPBA2 DID1 0x0 0x0
			    RDC_PDAP RDC_PDAP_ENET1 PDAP_D0D1_ACCESS 0x0 0x0
			    RDC_PDAP RDC_PDAP_SAI3  PDAP_D1_ACCESS 0x0 0x0
			    RDC_PDAP RDC_PDAP_UART4 PDAP_D1_ACCESS 0x0 0x0
			    RDC_PDAP RDC_PDAP_GPT1  PDAP_D1_ACCESS 0x0 0x0
			    RDC_PDAP RDC_PDAP_SDMA3 PDAP_D1_ACCESS 0x0 0x0
			    RDC_PDAP RDC_PDAP_I2C3  PDAP_D1_ACCESS 0x0 0x0
			    RDC_MEM_REGION 22 TCM_START TCM_END MEM_D1_ACCESS
			    RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D1_ACCESS
			    0x0      0x0            0x0  0x0 0x0
			  >;
			    /* rdc config when MCU stops
			     * memory:
			     *   TCM    --> domain 0/1 can access (0x7E0000~0x81FFFF)
			     *   DDR    --> domain 0/1 can access (0x80000000~0x81000000)
			     * end.
			     */
		stop-config = <
			    RDC_MEM_REGION 22 TCM_START TCM_END MEM_D0D1_ACCESS
			    RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D0D1_ACCESS
			    0x0      0x0            0x0  0x0 0x0
			  >;
	};

Best Regards,
Zhiming