Hello NXP engineers.
I am currently developing a BMS project and trying to establish communication with the MC33772C using the BMA6002, but at the moment the MC33772C has not been responding, and I would like to ask if there is any relevant experience or advice.
Current system architecture
S32K312 MCU
│SPI
▼
BMA6002
│TPL
▼
MC33772C
The MCU communicates with the BMA6002 via SPI.
The BMA6002 acts as a TPL gateway to communicate with the MC33772C.
So far the following is confirmed to be normal:
1. SPI communication between S32K312 and BMA6002 is normal
2. Can read/write BMA6002 registers normally
3. Have configured port0 and port1 of BMA6002 to TPL2 mode
4. Using initialization flow of MC33772C in Gen1 SDK
However:
MC33772C does not have any response.
SDK situation
According to the description of the BMS SDK on the NXP website:
- MC33772C belongs to Gen1 SDK
- BMA6002 belongs to Gen2 SDK
Currently my implementation is:
- Using the driver and initialization of MC33772C from Gen1 SDK Process
-Use BMA6002 as communication gateway
Not sure if this combination of Gen2 gateway + Gen1 BCC is officially supported.
Initialization Flow
The initialization flow basically refers to the sample code of MC33772C in Gen1 SDK:
Status = Phy_665a_Init( PHY_665A_SPI );
Status=Bcc_772c_Init(NULL_PTR);
Status=Bcc_772c_WakeupChain(BCC_CHAIN_ADDR, &BmsTDCfg_1);
Status=Bms_TD_Send( &BmsTDCfg_1, &ErrorStatus);
BCC_TD_Wait( &BmsTDCfg_1);
Status=Bms_TD_Clear( &BmsTDCfg_1);
Status=Bcc_772c_Enumerate(BCC_CHAIN_ADDR,BCC_DEVICE_ADDR, &BmsTDCfg_1);
Status=Bcc_772c_COM_ReadRegisters(BCC_CHAIN_ADDR,BCC_DEVICE_ADDR,MC33772C_INIT_OFFSET,1, &BmsTDCfg_1);
Status=Bms_TD_Send( &BmsTDCfg_1, &ErrorStatus);
BCC_TD_Wait( &BmsTDCfg_1);
if((BmsTDCfg_1.PhyTD- >Response.Data[3] &MC33772C_INIT_CID_MASK)! =BCC_DEVICE_ADDR)
BmsTDCfg_1.PhyTD- >Status=PHY_TS_TIMEOUT, timeout while executing Read INIT register flow.
The SPI data read when waking up the 772c is:
00 00 02 00 06 9E
00 04 40 01 02 AC
6 bytes (48 bit) per frame, which appears to match the TPL2 frame length.
These data are TPL2 data frames sent during the initialization/wakeup phase of the MC33772C.
Current Phenomenon
Currently observed:
- BMA6002 port0/port1 has been configured for TPL2 mode
- The above TPL2 data frame was sent during the initialization phase
- But no response was returned by the MC33772C
Questions
1. Is the combination of BMA6002+MC33772C officially supported?
(i.e. Gen2 gateway+Gen1 BCC combination)
2. When BMA6002 is configured in TPL2 compatibility mode, can
use the MC33772C initialization flow of Gen1 SDK directly?
3. Are the following two frames the legal initialization/wakeup TPL2 frame for MC33772C? 00 00 02 00 06 9E
00 04 40 01 02 AC
4. When using BMA6002 to communicate with MC33772C, is there any additional wake pulse or special configuration needed to wake up MC33772C?
Any relevant debugging suggestions or reference configurations would be greatly appreciated for pointers.
Thank you!
1. Is the combination of BMA6002+MC33772C officially supported?
(i.e. Gen2 gateway+Gen1 BCC combination)
gw] can be used in this way but there is no existing example.
2. When BMA6002 is configured to TPL2 compatibility mode.
Is it possible to use the MC33772C initialization flow of Gen1 SDK directly?
[gw] Theoretically it's possible.
3. Are the following two frames legitimate initialization/wakeup TPL2 frames for MC33772C? 00 00 02 00 06 9E
00 04 40 01 02 AC
[gw] You can try it yourself:
4. When using BMA6002 to communicate with MC33772C, is there any additional wake pulse or special configuration required to wake up MC33772C?
gw]Cut the port of BMA6002S to TPL2 and enable it, then send the TPL bus wake-up sequence specified by MC33772C (two valid TPL messages, 500-700 µs between them ), MC33772C will be woken up by the bus from Sleep/Idle; if the wake-up sequence is incomplete, the device will return to low power after tNOWUP ≤ 1.3 ms. If the wake-up sequence is incomplete, the device will return to low power consumption after tNOWUP ≤ 1.3 ms.