Hi,
Autoever asked a question regarding the OTP write. When an OTP write operation is on execution, OTP read, MRAM read/write are not allowed.
In the S32K3 RTD, there is an option of "Mem Load Access Code On Jab Start" in the S32K3_infls.jpg attached, but I couldn't find this option in the current S32K5 RTD.
Do we have a plan to add this option into S32K5 RTD? In the current version, how should I implement the OPT write routine?
Thanks.
Jose Luis.
Hi @nxf59838 ,
SW team follows RM to implement code, as you can see:
For tasks: read MRAM - write MRAM, OTP read - MRAM write they can be executed at same time with different partitions, but this not allowed for OTP write.
I think you can put this question to HW team.
Best regards,
Nhi
Hello Nhi,
The question was related to the following:
In the S32K3 RTD, there is an option of "Mem Load Access Code On Jab Start" in the S32K3_infls.jpg attached, but I couldn't find this option in the current S32K5 RTD.
Do we have a plan to add this option into S32K5 RTD? In the current version, how should I implement the OPT write routine?
also, another question is
- In the Mem_43_MRAM_MemMap.h file, the section MEM_43_MRAM_START_SEC_RAMCODE can be found, but it does not seem to be currently used.
- Is there any plan to implement functionality using MEM_43_MRAM_START_SEC_RAMCODE?
Thanks.
Jose Luis.
Hi Nhi,
I will sent your answer.
Thanks.
Jose Luis.
Hi @nxf59838 ,
In S32K3, the feature Mem Load Access Code On Jab Start to load access code that was stored same block with block want to write to SRAM, and this was done before starting write task to avoid read while write. If this feature isn't supported, for some cases that allow to read while write with different partitions, you can write to other partitions(except partition store access code) to solve the problem. But K5 doesn't allow to read, write MRAM or read OTP during write OTP so this can't solve the problem.
In current driver of K5, I just saw the example with DSP core loaded to MRAM. You can refer to the example of Platform.
If you load access code to OTP space, then write to OTP, the issue can happen. For this, you just can load access code to SRAM to solve the problem.
Other examples (M7, M4, R52 core), access code stored in SRAM, so it can't cause the issue read while write when you execute OTP write.
As far as I know, SW team has no plan to implement this feature yet.
For the question about Mem_43_MRAM_MemMap.h, the section MEM_43_MRAM_START_SEC_RAMCODE is in SRAM. As far as I know, we don't have the plan to use this section yet.
Best regards,
Nhi