Hello,
In the RT1170 Ref Man I see the bus diagram:
In particular the CM7 box:
GPIO2 and GPIO3 appear to be tightly coupled to the CM7 core. But also the seems to have a bus connection (the pink line).
What does this mean?
- GPIO2 and 3 are actually tightly coupled to the CM7 (for example using a dedicated communication channel instead of peripheral bus)?
- GPIO2 and 3 are only accessible from CM7, and not from CM4?
- Access to GPIO 2 and 3 (from CM7) is faster than to the other GPIOs (1-6)?
best regards
Max
Hi
See this video about high speed GPIO option on the i.MX RT 106x (with speed comparisons):
https://www.youtube.com/watch?v=nLInUIboLR0&list=PLWKlVb_MqDQEOCnsNOJO8gd3jDCwiyKKe&index=14
It is more or less equivalent to the two GPIO ports on the RT117x that you are referring to.
Regards
Mark
Hi @EdwinHz
What I'm asking you is whether CM7_GPIO(2,3) use the same bus as the other peripherals.
The CM7_GPIO2 and CM7_GPIO3 are special highspeed GPIOs that are only accessible from the CM7 core
In what sense are CM7_GPIO(2,3) faster than GPIO(2,3)? Do they occupy the bus for less time?
I found this diagram:
Which bus is for peripherals? APB or AHB32?
Where can I find a complete and comprehensive list of which slaves are connected to APB and AHB32?
best regards
Max
Hi @mastupristi,
The CM7_GPIO2 and CM7_GPIO3 (as referred to in the Reference Manual, and which are different from the normal GPIO2 and GPIO3) are special highspeed GPIOs that are only accessible from the CM7 core. From the Section "13.1 Chip-specific GPIO information" of the RM:
"GPIO_MUX2_IOn and GPIO_MUX3_IOn signals can be routed to the standard GPIO modules (GPIO2 and GPIO3), or they can be routed to high speed GPIO modules (CM7_GPIO2 and CM7_GPIO3). By default, all of the GPIO_MUX2 and GPIO_MUX3 signals route to the standard GPIO2 and GPIO3 modules. To use high speed GPIOs, the IOMUXC_GPR40 - IOMUC_GPR43 registers must be reconfigured to route the desired signals to the CM7_GPIO2 and/or CM7_GPIO3 modules."
BR,
Edwin.