2312783_en-US

[#1]

How to understand the reset pin diagram of FS26

Hi,NXP

As shown in the figure below, what does the dashed box in the figure mean? Does it indicate that the circuit within the dashed box may not necessarily exist? If it doesn't exist, how can an external reset signal reset the FS26?

Is there an error with this dashed box selection? Should it select LBIST instead? Because chips for ASIL D applications have LBIST.
wuxianlong_0-1770286054313.png

Best Regards,
xianlong

Functional SafetyRe: How to understand the reset pin diagram of FS26

Hi，@ErikaC 

Yes, I see that the latest manual only has a chapter description with RSTB as the output function.

However, ① in the pin function description of the manual, RSTB has input and output functions, not just output.
wuxianlong_0-1770341071203.png

② Although RSTB cannot reset the main state machine, it can reset the fault state machine. Moreover, RSTB has an 8-second timer for detection, indicating that RSTB can detect the input level. What I'm curious about is how its input detection is implemented?
wuxianlong_1-1770341173443.png

Best Regards，
xianlong

Re: How to understand the reset pin diagram of FS26

Hello,

The dashed box does not mean the circuit is optional. It simply represents the internal redundant analog path used to force RSTB low in a fail‑safe condition, and this hardware is always present. This path is explicitly described in the FS26 safety manual section 5.2.15.1 Because RSTB is only an output, an external reset cannot reset the FS26, and the dashed section only shows how the PMIC internally asserts RSTB, not how it receives it. ABIST tests this analog path, while LBIST tests the digital safety logic; both are required for ASIL‑D devices, so there is no error in showing ABIST inside the dashed box instead of LBIST.

Hope this helps!

Re: How to understand the reset pin diagram of FS26

I cannot share the the detailed block diagram of the RSTB pin here in the community. However,  the digital is driving the output level of the pin thanks to the open-drain but, at the same time, we sense this same output level thanks to the hysteresis buffer to provide this information to the fail-safe logic block.

There is no error in the picture you sent from the datasheet.
The LBIST is checking the digital, which is why it’s written in the FS_LOGIC block.
However, the ABIST is only checking the hysteresis buffer making sure that the sensing is properly functioning, hence the dotted line.

I hope this clarifies everything. If not, please let me know.