Hardware:
Board: S32G399A-VNP-RDB3
Boot Sequence: U-Boot loads M7 binary → startm7 command → Linux boots on A53
Software:
M7 Core: RTD 5.0.0 (S32_RTD_5_0_0_QLP03_D2505) with FreeRTOS and IPCF
A53 Cores: Linux Scarthgap BSP 46
Development Tool: S32 Design Studio for S32 Platform 3.5
Current Working Status:
I have coupled several M7 example applications that work correctly:
CAN communication
DIO (LED control)
GPT (timers)
All these applications function properly in M7 standalone mode. But when I try and add the IPCF example to this, I'm facing the below problem.
When the M7 RTD application calls Mcu_InitClock(), the A53 side experiences corrupted UART output and system hang. After U-Boot executes the startm7 command, the A53 becomes unresponsive and cannot proceed to Linux boot.
U-Boot Command Sequence:
=> dcache off
=> mw.q 0x34000000 0x0 0x60000
=> fatload mmc 0:2 0x80000000 myBin.bin
=> cp.b 0x80000000 0x34300000 ${filesize}
=> startm7 0x34500400
=> boot
Observed Behavior with Mcu_InitClock()
M7 Console:
Successfully displays all logs for UART, CAN, and DIO examples
M7 application runs normally and all peripherals function correctly
A53/U-Boot Console:
Displays garbage characters: �c?�p8�p�
System becomes completely unresponsive
Cannot proceed to Linux boot
I have also noticed that the linux device tree specifies the IPCF address range used for PFE reservations, I have modified the device tree with proper reservations for IPCF address range.
[Linker snippet:
MEMORY
{
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00000000 /* 0KB - Not Supported */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x0000E000 /* 64K */
int_dtcm_stack : ORIGIN = 0x2000E000, LENGTH = 0x00002000 /* 8K */
int_sram_shareable : ORIGIN = 0x24000000, LENGTH = 0x00004000 /* 16KB */
int_hse_sram_shareable : ORIGIN = 0x22C00000, LENGTH = 0x00004000 /* 16KB */
IPCFsharedRAM (RW) : ORIGIN = 0x34000000, LENGTH = 0x00300000 /* 3MB */
int_sram_c0 : ORIGIN = 0x34300000, LENGTH = 0x00200000 /* 2.0MB - M7_0 code/data */
int_sram_no_cacheable_c0 : ORIGIN = 0x34500000, LENGTH = 0x00100000 /* 1MB, includes int_results */
ram_end_c0 : ORIGIN = 0x34600000, LENGTH = 0x00000000 /* End of core 0 ram */
int_sram_c1 : ORIGIN = 0x34600000, LENGTH = 0x00100000 /* 1.0MB */
int_sram_no_cacheable_c1 : ORIGIN = 0x34700000, LENGTH = 0x00080000 /* 512KB */
ram_end_c1 : ORIGIN = 0x34780000, LENGTH = 0x00000000 /* End of core 1 ram */
int_sram_c2 : ORIGIN = 0x34780000, LENGTH = 0x00100000 /* 1MB */
int_sram_no_cacheable_c2 : ORIGIN = 0x34880000, LENGTH = 0x00080000 /* 512KB */
ram_end_c2 : ORIGIN = 0x34900000, LENGTH = 0x00000000 /* End of core 2 ram */
int_sram_c3 : ORIGIN = 0x34900000, LENGTH = 0x00000000 /* 0MB */
int_sram_no_cacheable_c3 : ORIGIN = 0x34900000, LENGTH = 0x00000000 /* 0KB */
ram_end_c3 : ORIGIN = 0x34900000, LENGTH = 0x00000000 /* End of core 3 ram */
ram_rsvd2 : ORIGIN = 0x34900000, LENGTH = 0x00AFFFFF /* End of SRAM */
LLCE_CAN_SHAREDMEMORY : ORIGIN = 0x43800000 LENGTH = 0x3C800
LLCE_LIN_SHAREDMEMORY : ORIGIN = 0x4383C800 LENGTH = 0xa0
LLCE_BOOT_END : ORIGIN = 0x4383C8A0 LENGTH = 0x50
LLCE_MEAS_SHAREDMEMORY : ORIGIN = 0x4384FFDF LENGTH = 0x20
} ]
I felt the garbage value was becuase the RTD Mcu_InitClock() function calls Clock_Ip_ResetClockConfiguration(), which attempts to write all MC_CGM MUX selectors. This includes MC_CGM_1 registers that control A53_CORE_CLK and XBAR_CLK.(?)
When M7 reconfigures these shared clock sources, the A53 LinFlexD_0 UART loses its correct clock configuration, resulting in corrupted output and subsequent system hang.
I would appreciate guidance on the following points:
1. Clock Initialization Sequence
What is the recommended RTD clock initialization approach for AMP mode when U-Boot manages the clock tree? Should M7 skip Mcu_InitClock() entirely? Is there a specific API or configuration to enable only M7 partition clocks without affecting shared resources?
2. Is there a reference project or application note that demonstrates RTD with IPCF in AMP mode using the U-Boot boot flow? I would requrest someguidance on proper clock and resource partitioning for AMP scenarios.
So, I would greatly appreciate your insights on this if you could help me with either;
Documentation or guidelines for RTD initialization sequence in AMP mode
Required U-Boot or ATF modifications to properly configure M7 peripheral clocks
XRDC configuration examples for M7 and A53 resource partitioning
Reference to any application notes or example projects for this use case
I did come across scattered community posts on similar issues, but was not able to conclude anything. Came cross this document today [https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/nxp-designs%40tkb/692/1/S32G_Bootloader_... and felt it is closer to what I'm facing and would appreciate if there was a cleaner and updated version of this.
Thankyou.
Hello, @sanchez
Thanks for your post.
The issues are likely caused by the clock/resource, etc. confliction between M and A cores
For multi-core working on S32G, it is suggested introducing a bootloader to boot the board, the sample method is documented in AN13750
BR
Chenyin
Hello, @sanchez
You are welcome, it is my pleasure to assist.
BR
Chenyin
Adding few more details regarding the versions I'm using:
Linux BSP 46
EB tresos AutoCore 8.8.7 for S32G3
GoldVIP-S32G3-1.15.0
S32DS.3.6.1
SW32G_RTD_4.4_5.0.0
SW32G_RTD_4.4_5.0.0_QLP04
SW32G_IPCF_4.11.0
S32G Real-Time security Crypto Driver(5.0.0 QLP01) - Not available
S32G Safety Software Framework (2.0.3) - Not available
Hi @chenyin_h
As suggested by you, I'm trying to introduce a bootloader to the board following steps from AN13750. I've copied all the necessary files from plugins into the Tresos directory and have a fullt trusted license as well on the EB Tresos License Administrator. But to follow the next steps and remove un-required components, I;m getting this No License found error. I've referred to the bootloader manual and developer notes as well for GoldVIP and it is not clear to me what license is missing! Could you shed some light on this, please?
Hi again @chenyin_h
I've also tried installing this version, but I got this error while activating the license;
Am i missing something?
Activating NodeLocked License 6xxx-xxxx-xxxx-xxxx, Number Of Licenses: 1
Status: 4, Creating request
Status: 5, Request created
Status: 6, Context created
Status: 7, Connected to remote server
Status: 8, Request Sent
Status: 9, Polling for response
Status: 10, Waiting for response
Status: 9, Polling for response
Status: 10, Waiting for response
Status: 9, Polling for response
Status: 10, Waiting for response
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Status: 11, Done
ERROR: flxActAppActivationSend (50040,41147,10248)
The quantity specified exceeds maximum quantity allowed (0).
Connection to FlexNet Operations Server failed.Hello, @sanchez
Thanks for your reply.
For building with bootloader project, I suggest using the following tool(EB tresos studio 27.1)instead of "EB tresos AutoCore 8.8.7 for S32G3".
BR
Chenyin
Hello, @sanchez
Thanks for your reply.
According to the log you shared, it is because "quantity specified exceeds maximum quantity allowed".
As you may know, EB is not NXP's product, we obtained evaluation licenses from EB, and while users exceed the quantity EB defined, the license shown in the download page could not be used any more.
Let me report it soon and usually it would be updated in a few days, sorry for your inconvenience.
BR
Chenyin
Hi @chenyin_h
I’m following up regarding the status of the license update, as it has been couple of days and I have not yet seen it reflected on your website.
We are currently working against a firm timeline, so I would greatly appreciate a clear update on where things stand and the expected timeframe for completion. If possible, please also confirm that I will be notified as soon as the license becomes active and publicly available.
BR
Hello, @sanchez
Now, our team is in the process of updating the activation code information in the system. It will be reflected later.
Also, please check the mail of your inbox of the community.
BR
Chenyin