Hi,
I’ve updated my IMX415 driver by following the sensor porting guide for imx8mplus. While reading the CSIS_DPHYSTATUS register (offset 0x20), I’m seeing a value of
0x00000001
. This indicates that the clock lane is in the STOP state, while the data lanes are not.
Could you please advise on how to resolve this issue?
Hello,
Please refer to AN13573 section 2.5 about the mode transitions.
https://www.nxp.com.cn/docs/en/application-note/AN13573.pdf
Based on this could you try to set it in non-continuous mode.
in continuous clock mode, there may only be one LP state at the very beginning, and clock lane will always work in HS mode later. So it's better to make sensor work in LP state before enable 8MP DPHY. otherwise, DPHY may not detect the HS mode, then it can't receive data from sensor.
Best regards/Saludos,
Aldo.
Hi,
I am currently using the IMX415 sensor on the i.MX8M Plus platform. While streaming, I can see that the frame start log is reported, but the corresponding frame end log never appears. Could you please help me understand the possible causes of this issue and how it can be resolved?
Additionally, to configure non-continuous clock mode, will programming the following register be sufficient for this to take effect?
Hi,
The buffer overflow issue was resolved after reducing the CSI controller clock frequency from 500 MHz to 266 MHz. With the lower clock setting, video streaming works reliably without encountering buffer overflow errors.
But why didn't it work for 500MHZ ,do u have any idea??