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i.MX8M Plus – Ethernet PHY (Marvell 88E1512) Link Not Coming Up on Custom DDR4 Board

Hi Team,

I am working on a custom i.MX8M Plus DDR4 board and facing an issue with Ethernet PHY link-up.

Hardware details:

SoC: i.MX8M Plus
PHY: Marvell 88E1512
Interface: RGMII-ID
Board: Custom design

Issue description:
I am unable to bring up the Ethernet PHY link. While probing the PHY clocks using an oscilloscope:

TX_CLK = 125 MHz
RX_CLK = 125 MHz

So the PHY clocks appear to be present and stable, but the PHY link does not come up and I am unable to ping the PHY.

Also attached the Kernel log for reference.

Steps performed:

mount -t proc proc /proc mount -t sysfs sysfs /sys mount -t devtmpfs devtmpfs /dev ifconfig eth1 192.168.5.1 up

[ 54.807828] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-0

[ 54.815831] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-1 [ 54.823833] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-2 [ 54.831900] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-3 [ 54.839831] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-4 [ 54.892291] imx-dwmac 30bf0000.ethernet eth1: PHY [stmmac-1:01] driver [Marvell 88E1510] (irq=POLL) [ 54.901504] imx-dwmac 30bf0000.ethernet eth1: No Safety Features support found [ 54.908774] imx-dwmac 30bf0000.ethernet eth1: IEEE 1588-2008 Advanced Timestamp supported [ 54.917533] imx-dwmac 30bf0000.ethernet eth1: registered PTP clock [ 54.924316] imx-dwmac 30bf0000.ethernet eth1: configuring for phy/rgmii-id link mode [ 54.932963] 8021q: adding VLAN 0 to HW filter on device eth1

The above procedure working on i.MX8MPLUS EVK and able to ping the PHY.

Observations / Questions:

PHY clocks are present (125 MHz TX/RX).
PHY driver is detected, but link never comes up.
Is there any known device tree, strap configuration, or RGMII delay requirement specific to Marvell 88E1512 on i.MX8M Plus?
Any recommended PHY register checks or debug steps to further isolate the issue?

Any guidance or pointers would be greatly appreciated.

Thanks in advance.

Re: i.MX8M Plus – Ethernet PHY (Marvell 88E1512) Link Not Coming Up on Custom DDR4 Board

Hello @NXP_USER_05

I hope you are doing very well.

Could you please share your device tree?

Also, if possible the related schematic.

Best regards,

Salas.

Re: i.MX8M Plus – Ethernet PHY (Marvell 88E1512) Link Not Coming Up on Custom DDR4 Board

HI @Manuel_Salas ,

Below attached the schematic and here is the Device tree.

&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
snps,force_thresh_dma_mode;
snps,mtl-tx-config = <&mtl_tx_setup>;
snps,mtl-rx-config = <&mtl_rx_setup>;
status = "okay";

mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

ethphy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
realtek,clkout-disable;
};
};

mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <5>;

queue0 {
snps,dcb-algorithm;
snps,priority = <0x1>;
};

queue1 {
snps,dcb-algorithm;
snps,priority = <0x2>;
};

queue2 {
snps,dcb-algorithm;
snps,priority = <0x4>;
};

queue3 {
snps,dcb-algorithm;
snps,priority = <0x8>;
};

queue4 {
snps,dcb-algorithm;
snps,priority = <0xf0>;
};
};

mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <5>;
snps,rx-sched-sp;

queue0 {
snps,dcb-algorithm;
snps,priority = <0x1>;
snps,map-to-dma-channel = <0>;
};

queue1 {
snps,dcb-algorithm;
snps,priority = <0x2>;
snps,map-to-dma-channel = <1>;
};

queue2 {
snps,dcb-algorithm;
snps,priority = <0x4>;
snps,map-to-dma-channel = <2>;
};

queue3 {
snps,dcb-algorithm;
snps,priority = <0x8>;
snps,map-to-dma-channel = <3>;
};

queue4 {
snps,dcb-algorithm;
snps,priority = <0xf0>;
snps,map-to-dma-channel = <4>;
};
};
};

&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy1>;
fsl,magic-packet;
status = "okay";

mdio {
#address-cells = <1>;
#size-cells = <0>;

ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
eee-broken-1000t;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
realtek,aldps-enabl
realtek,clkout-disable;
};
};
};

Thank You.

Re: i.MX8M Plus – Ethernet PHY (Marvell 88E1512) Link Not Coming Up on Custom DDR4 Board

Hello @NXP_USER_05

I saw in your device tree definitions like:

realtek,aldps-enable;
realtek,clkout-disable;

Those are definitions for Realtek PHY but you are using Marvell 88E1512.

Please try removing the realtek properties.

Best regards,

Salas.

Re: i.MX8M Plus – Ethernet PHY (Marvell 88E1512) Link Not Coming Up on Custom DDR4 Board

Hi @Manuel_Salas

I am working on an i.MX8M Plus DDR4 custom board and I am able to successfully boot the system entirely from QSPI flash (32MB).

My current boot components are:

flash.bin (U-Boot)

Image.gz (Linux kernel)

imx8mp-ddr4-evk.dtb

core-image-minimal-initramfs.cpio.gz

Since my board does not have SD card or eMMC, I am using initramfs as the root filesystem.

Now I want to include gcc inside core-image-minimal-initramfs.cpio.gz, so that I can compile applications directly on the target without relying on any external storage.

Changed the conf/local.conf and then build using command

$bitbake core-image-minimal-initramfs

Also attached the local.conf file for your reference.

It generated core-image-minimal-initramfs.cpio.gz but in bin/ and usr/bin respective folders gcc is not present and getting like below after booting kernel and cpio.gz.

~ # gcc
/bin/sh: gcc: not found

~ # ls
bin dev home init.d media proc run sys usr
boot etc init lib mnt root sbin tmp var

Could you please advise:

What is the correct Yocto method to include gcc in an initramfs image?

Are there any recommended configurations or limitations when using gcc inside initramfs (RAM usage, image size, etc.)?

Any guidance or reference to NXP-supported Yocto practices would be very helpful.

Thank You.