2294153_en-US

[#1]

[ls1046ardb] Exchange DDR4 DIMM to other DIMM(2GB), then boot failed.

I exchanged DDR4 DIMM with other DIMM.

(This DIMM can be used general Ubuntu-PC, and it can pass memtest86)

Then boot sequence failed with following error message.

ERROR:   Board parameters no match.

ERROR:   Failed matching board timing.

In cal_board_params() function, I found pdimm->rc value was 0x01, then modified following parameter.

static const struct rc_timing rce[] = {
    {U(1600), U(8), U(7)},
    {U(1867), U(8), U(7)},
    {U(2134), U(8), U(9)},
    {}
};

static const struct board_timing udimm[] = {
    {U(0x01), rce, U(0x01020304), U(0x06070805)},  // add this line
    {U(0x04), rce, U(0x01020304), U(0x06070805)},
    {U(0x1f), rce, U(0x01020304), U(0x06070805)},
};

However boot sequence failed.

It seems that BL31 cannot be booted, and failed.

NOTICE:  BL2: Booting BL31

INFO:    Entry point address = 0xfbe00000

INFO:    SPSR = 0x3cd

// no more logs..

I think that rce and udimm parameters should be configured using QCVS(CodeWarrior), but I got following error.

1. Create new "QorIQ Configuration Project"
2. Select "DDR Memory Controller Configuration"
3. Select "From memory file", choose SPD binary file as "Input file"
4. "Import" button
5. Error message "Please check the value of DDR data rate in import file!" is shown.

Is my approach correct?

How to create correct parameters by QCVS?

Re: [ls1046ardb] Exchange DDR4 DIMM to other DIMM(2GB), then boot failed.

You need to use QCVS DDRv tool to connect to the custom board to do validation and optimization to get optimized DDR initialization parameters and used them in ATF software.

Please refer to DDRv user manual https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf

The customer needs to create a DDR QCVS project according to the custom board.

If DIMM is used on the customer’s board, there is SPD on the target, please select “Read SPD” in DDR configuration panel when create QCVS DDR project.

Then use QCVS DDRv tool to connect to the target board to do further optimization and validation.

After successful validation, please click Project->Generate Processor Expert Code to get the optimized DDR controller configuration parameters in file ddr_init1.c, and use it to modify ATF source code plat/nxp/soc-ls1046a/ls1046ardb/ddr_init.c.

Re: [ls1046ardb] Exchange DDR4 DIMM to other DIMM(2GB), then boot failed.

Thank you for comment.

I might have misunderstood..
Can't QCVS read 512-byte SPD binary file?
Not from SPD in DDR DIMM.

I don't have JTAG hardware now.

Best Regards,
Narita

Re: [ls1046ardb] Exchange DDR4 DIMM to other DIMM(2GB), then boot failed.

JTAG hardware is necessary, you need to connect QCVS DDRv tool to the target board to do optimization and validation through JTAG to get the optimization parameters.

Re: [ls1046ardb] Exchange DDR4 DIMM to other DIMM(2GB), then boot failed.

Thank you.
I'll get CodeWarrior TAP and try as your comment.

Best Regards,
Narita