Hiya all,
I'm facing a problem with the implementaion of the PCF85063AT/AAZ RTC.
We are currently using a dual channel power supply in a Oring configuration :
Here is the rooting : pin 1 and 2 are used for the quartz and pin 8 for VDD
The issue is that the OS ( oscillator stop ) flag is triggered when the 3.3V rise. We added a RC filter after the diodes to lower the noise at switching.
However the OS flag is still rising from time to time.
We ended up measuring the quartz and found that it was disturbed during the power_up ( below one measure on one side of the quartz referenced to GND )
We are wondering if there is any way to protect the quartz and still other problemes we coudn't see.
We are thinking of using a 4 pins quartz instead of the current quartz that use 2.
We are also considering that the noise is also comming from the GND and in this case maybe a Ring shield could be considered.
Did any of you encontered a similar problem before or are having a solution for us ?
It would be greatly appreciated.
Hi, We are using a 7pF configuration. We confirmed this is properly set by reading the appropriate register. It's also the default configuration.
Hello,
The device features an internal oscillator that requires 32.768 kHz external quartz crystal. Selectable integrated oscillator load capacitors for CL = 7 pF or CL = 12.5 pF are also available.
In this case, what is the load capacitor selected?
Thank you for confirming. In this case, the recommendation would be:
Place a 100 nF ceramic capacitor as close as possible to the RTC’s VDD pin.
Add an additional 10 µF capacitor to help smooth the power-up sequence.
Consider using an LC filter instead of just an RC filter to better reduce high-frequency noise.
Use a 4-pin crystal as in our evaluation board with shielding if the environment is noisy, this helps minimize external interference.
I also recommend reviewing the document at the following link: