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Unable to flash S32K146EVB-Q144 board as D1 glowing red

I have a S32K146EVB-Q144 evaluation board which was working fine initially.
During a debug session where I had implemented Lin stack, it stopped working.
When i reset my controller i see a continuous Red light on D1 and other two green lights are still there.
I've used J10 and J107 at position 2-3 to select power from USB source and J104 at position 2-3 to select OpenSDA app flash mode.
Now my controller is not getting detected at all by S32DS.
I tried following the steps mentioned in below post as symptom seems exactly same.
Re: S32K144 D2 RED LED is ON always - NXP Community

Here I was able to halt the processor in OpenSDA using P&E Kinetics Recovery Tool but still not able to flash any new application.

Even if halt is achieved, i am not able to flash it again and red light is still on.

Controller is able to go into bootloader mode as well by adjusting jumper J104 and i was actually able to flash ne bootloader app in it as well. But somehow I am not able to write the flash again, and if i try flashing any example .srec file, D2 keeps on flashing periodically (usually in successful flashing it blinks once and then app starts running).

So in a nutshell :
-Controller is not able to reach main or getting continuous resets
-Controller is not able to write the flash again (could be security issue).

I did tried mentioned techniques in above thread except the one involving SEGGER-JLINK as I dont have that debug probe. I do have a PE Multilink Universal with me but its not able to recover/erase the flash as well.

Here are the details of board :
Board Name is: S32K146EVB-Q144
MicroBoot Kernel Version is: 1.08
Bootloader Version is: 1.13
Installed Application: PEMicro EVB-S32K144 Mass Storage/Debug App
Application Version is: 1.25
DUID is: 39A33939-91818199-37539805-F97AE678
EUID is: 4141A238-1BDB8733-1854BA22-D38368D6
TUID is: 74823938-47328196-8576CC9B-0242983E
TOA is: 86B6E505-56F042E0-79B2A114-62BA758F
TOA2 is: 86B6E505-EB1A8A7C-AF6E54B6-43532420
SUID is: 86B6E505-5BA18877-37239804-8003EC65

Is MCU locked permanently ?
If not how can i recover my board ?
Is there any h/w failure I am looking at ? (Just FYI D2 and D3 glows green which i think means my 5V and 3.3V power rails are working fine)
Is there a physical way to mass erase ? (Cant use S32DS emergency kinetics option as board is not detectable there at all).
Can grounding any pin of OpenSDA chip leads to erase of flash memory ?

Re: Unable to flash S32K146EVB-Q144 board as D1 glowing red

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Re: Unable to flash S32K146EVB-Q144 board as D1 glowing red

Hi

After the P&E Recovery Utility halt MCU, close the tool.

Then follow the Step 3 or Step 4 to reprogram the S32K146.

I'm not sure if this is due to the Application Version is: 1.25 . Please press and hold the reset button SW5, then insert the USB cable and place MSD-DEBUG-S32K146EVB-Q144_Pemicro_v121.SDA into the BOOTLOADER drive. This will update the Application Version to 1.21.

I've also attached lpit_periodic_interrupt_s32k146.srec.

By the way, you don't need external Segger J-Link. If you follow Step6:Inserting J7 while holding down SW5 puts OpenSDA into BOOTLOADER mode. And then drop SEGGER J-Link application firmware into it(OpenSDA_V1.bin). The onboard debugger will then become J-Link.

Best Regards,
Robin
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Re: Unable to flash S32K146EVB-Q144 board as D1 glowing red

Hello Robin,

Thank you for your prompt response, well I tried rolling it back to MSD-DEBUG-S32K146EVB-Q144_Pemicro_v121.SDA,
Its behaving the same way, bootloader app is flashed but D1 still glowing red and I am not able to flash .srec file after halting it using kinetis recovery tool. I see that controller is trying to flash the srec but fails since D2 blinks periodically(usually it blinks only 3-4 times and app is flashed).

I then tried switching the bootloader to OpenSDA_V1.bin, I tried attempting connection using J-Link commander afterwards and I see following logs :

SEGGER J-Link Commander V8.94 (Compiled Dec 10 2025 14:50:47)
DLL version V8.94, compiled Dec 10 2025 14:49:54

Connecting to J-Link via USB...O.K.
Firmware: J-Link OpenSDA compiled Jan 31 2023 13:42:36
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 00m 28s
S/N: 621000000
VTref=3.300V

Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. : S32K146
Type '?' for selection dialog
Device>S32K146
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>SWD
Specify target interface speed [kHz]. : 4000 kHz
Speed>100
Device "S32K146" selected.

Connecting to target via SWD
ConfigTargetSettings() start
ConfigTargetSettings() end - Took 22us
InitTarget() start
SWD selected. Executing JTAG -> SWD switching sequence.
Timeout while halting CPU.
InitTarget() end - Took 392ms
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[2]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011, ADDR: 0x00000000)
AP[1]: JTAG-AP (IDR: 0x001C0000, ADDR: 0x01000000)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
Initializing 126976 bytes work RAM @ 0x1FFF0000
Reset type: NORMAL (https://kb.segger.com/J-Link_Reset_Strategies)
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
CPU could not be halted
Reset: Failed. Toggling reset pin and trying reset strategy again.
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPv0 detected
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
CPU could not be halted
CPU could not be halted
CPU could not be halted

****** Error: Failed to halt CPU.
Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M4 identified.
J-Link>

Re: Unable to flash S32K146EVB-Q144 board as D1 glowing red

Please use an oscilloscope to observe the waveform of the reset pin, send me the waveform and tell me the reset period and high-level width. In some cases, it may be impossible to recover, and you may have to replace the S32K1 chip.

Connection strategies & recovery steps:
Goal: give the debugger a chance to halt the core and neutralize problematic firmware.

A. Lower SWD speed + “connect under reset”
In J‑Link Commander:

J-Link> device S32K146
J-Link> if SWD
J-Link> speed 1000 ; start at 1 MHz; if still failing, drop to 100 kHz
J-Link> connect

If it still fails, use manual connect‑under‑reset:

Hold RESET_b low externally, power the board.
Run connect in Commander.
Release reset and immediately:

J-Link> r
J-Link> h
J-Link> halt

Try several times, especially with 100 kHz SWD speed—timing can be critical.

B. Change J‑Link reset strategy
Different Reset Strategy values behave differently. In Commander (exact IDs may vary by version):

J-Link> SetResetType = 3   ; a common “connect under reset / halt after reset”; Try 2 / 4 / 12 etc. depending on your J-Link version
J-Link> r
J-Link> halt

Alternatively, try selecting "Connect under reset" in J-Link Commander.

Re: Unable to flash S32K146EVB-Q144 board as D1 glowing red

According to the S32K146EVB-SPF-29844-RB.pdf:
J104 1-2 Reset signal from OpenSDA
J10 2-3 P5V0
If you have an external 9V or 12V power supply, you can also try connecting J107 1-2 P5V_SBC. If you happen to have an external debugger, such as PEMicro Multilink, try using it to see if it can download programs for the S32K146.

What was the last project downloaded? Is CSEc enabled?

Please answer my previous questions and provide me with the reset signal measured using an oscilloscope.