2268424_en-US

はい

custom board base on imx8mp-evk spi error

Hi, NXP team. 我们自己的板子基于imx8mp-evk，在调试switch过程中报错，spi读取的一直是0.pgc也报错，不知道是不是这个pgc导致的。下面是我们的结构和报错信息。

        ┌──────────────────────────────┐
        │                              │
        │                              │
        │                              │
        │                              │
        │                              │
        │                  ┌───────────┴───────────────┐
        │                  │         SPI               │
  ┌─────▼─────────┐        │                           │
  │   SPI         │        │                           │
  │ port0         │        │M                          │
  │ port1    port2◄────────┤A                          │
  │    SJA1105    │        │C                          │
  │               │        │1       CPU                │
  │ port3         │        │   MIMX8ML8DVNLZAB         │
  │ port4         │        │                           │
  │               │        │                           │
  └─────── ───────┘        │                           │
                           │        MAC2               │
                           └──────────┬────────────────┘
                                      │
                                      │
                                      │
┌───────── ────────┐                  │
│       RGMII      │                  │
│                  │                  │
│   PHY            │                  │
│   88E1512       M│                  │
│                 D◄──────────────────┘
│                 I│
│                 O│
│                  │
└───────┬──────────┘
        │
        │
        │
        │
        │
        │
        │
        │
        │
        └► OUT

Re: custom board base on imx8mp-evk spi error

@Zhiming_Liu, thanks for the reply, is there any reference about the device tree of sja1105, there is a problem on my side to write it, the driver handles the error.

[    2.593142] sja1105 spi1.0: match data device id :: 2936013582
[    2.599201] sja1105 spi1.0: sja1105_xfer_u32 retuen value :: 0
[    2.605165] sja1105 spi1.0: match dev info dev id :: 2617245708 -> -1358953714
[    2.612503] sja1105 spi1.0: match dev info dev id :: 2650800910 -> -1358953714
[    2.619833] sja1105 spi1.0: match dev info dev id :: 2936013582 -> -1358953714
[    2.627168] sja1105 spi1.0: Probed switch chip: SJA1105P
[    2.632499] sja1105 spi1.0: Incorrect bindings: absent "ports" node
[    2.638782] sja1105 spi1.0: Failed to parse DT: -19

Here is my equipment tree

// switch & imu
&ecspi1 {  
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <3>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;

	// assigned-clocks = <&clk IMX8MP_CLK_ECSPI1>;
	// assigned-clock-rates = <&clk IMX8MP_SYS_PLL1_80M>;

	cs-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>,		
							<&gpio1 14 GPIO_ACTIVE_LOW>,	 
							<&gpio1 10 GPIO_ACTIVE_LOW>;	

	status = "okay";

	sja1105p@0 {
    #address-cells = <1>;
    #size-cells = <0>;
		compatible = "nxp,sja1105p";
		firmware_name = "sja1105p_cfg.bin"; /// optional 
		spi-max-frequency = <0x17d7840>;  // 25 000 000 
		spi-cpha;
		reg = <0x0>;
    status = "okay";

		port-0 {
			is-host = <0x0>;
			null-phy = <0x1>;
			phy-ref = < 0 >;
			logical-port-num = < 0 >;
		};

		port-1 {
			is-host = <0x0>;
			null-phy = <0x1>;
			phy-ref = < 0 >;
			logical-port-num = < 0xff >;
		};

		port-2 {
      label = "cpuMAC";
      phy-mode = "rgmii-id";
			is-host = <0x1>;
			null-phy = <0x0>;
			phy-ref = <0>;
			logical-port-num = < 1 >;

      ethernet = <&eqos>;
      fixed-link {
        speed = <1000>;
        full-duplex;
      };
		};

		port-3 {
			is-host = <0x0>;
			null-phy = <0x0>;
			phy-ref = <0>;
			logical-port-num = < 2 >;
		};

		port-4 {
			is-host = <0x0>;
			null-phy = <0x0>;
			phy-ref = <0>;
			logical-port-num = < 3 >;
		};
	};

	imu_accel@1 {
		reg = <1>;
		compatible = "SMI230ACC";
	};
	imu_gyro@2 {
		reg = <2>;
		compatible = "SMI230GYRO";
	};

};
&eqos {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_eqos>;
  status = "okay";
	mdio {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

	};
	mtl_tx_setup: tx-queues-config {
		snps,tx-queues-to-use = <5>;

		queue0 {
			snps,dcb-algorithm;
			snps,priority = <0x1>;
		};

		queue1 {
			snps,dcb-algorithm;
			snps,priority = <0x2>;
		};

		queue2 {
			snps,dcb-algorithm;
			snps,priority = <0x4>;
		};

		queue3 {
			snps,dcb-algorithm;
			snps,priority = <0x8>;
		};

		queue4 {
			snps,dcb-algorithm;
			snps,priority = <0xf0>;
		};
	};

	mtl_rx_setup: rx-queues-config {
		snps,rx-queues-to-use = <5>;
		snps,rx-sched-sp;

		queue0 {
			snps,dcb-algorithm;
			snps,priority = <0x1>;
			snps,map-to-dma-channel = <0>;
		};

		queue1 {
			snps,dcb-algorithm;
			snps,priority = <0x2>;
			snps,map-to-dma-channel = <1>;
		};

		queue2 {
			snps,dcb-algorithm;
			snps,priority = <0x4>;
			snps,map-to-dma-channel = <2>;
		};

		queue3 {
			snps,dcb-algorithm;
			snps,priority = <0x8>;
			snps,map-to-dma-channel = <3>;
		};

		queue4 {
			snps,dcb-algorithm;
			snps,priority = <0xf0>;
			snps,map-to-dma-channel = <4>;
		};
	};

};

Re: custom board base on imx8mp-evk spi error

Hi @hjk003
pgc@8 is the power domain of the VPU, spi has nothing to do with pgc in the power domain.

Best Regards,
Zhiming