Normally we make a dual core project as below:
- Master Core Project running as a XIP target
- Slave Core Project running as a RAM target
Master Core loads the image of the slave core into SRAM out of POR and kicks off the slave core, so that both the master and slave cores run application from different memory regions to gain the max performance.
There are some cases when users need to get both the master and slave cores run applications as XIP targets, so the application image size, especially for the slave core would not be limited by the SRAM size, and it is also technically possible. Here are some tips for this kind of use case.
1. Changes on Master Core Project
a) Update the memory settings by splitting the flash into two parts, one for master core, the other for slave core. Here the size of each of them is set as 0x2000000, but you may adjust them according to your requirements.
b) Put the slave core application code into the second flash region as shown above.
c) Update the slave core boot address in the master core project.
2. Changes on Slave Core Project
a) Add a flash region for slave core application code, and make sure the flash loader is selected properly.
You may notice this flash region starts from 0xA000000 instead of 0x32000000 for the master core project. That is because this is the alias address for the slave core in this case, please refer to the following for details.
With offset of 0x2000000 we set for the master core project, we have 0xA000000 here for the slave core project.
b) Unselect the option of "Link application to RAM"
3. Build & Debug
This is a guide line to run both the master core and slave core projects as XIP targets from one flash.