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How to access FIFO contents in UART FIFO mode

Hello experts,

Customer: Zoox

Chips: S32G399A

The customer wants to enable UART DMA mode in QNX. The issue they encountered is that an extra character appears periodically. The customer suspects that this extra character is caused by the interaction between DMA and the UART RX FIFO. They believe that the (FIFO Not Empty) flag does not accurately reflect the actual data in BDRL and BDRM. When I used a debugging tool to monitor the BDRL and BDRM registers, I found that these two registers are not accessible. Therefore, is there any other way to accurately reflect the content in the UART RX FIFO?

Maolin_Pan_0-1760081568604.png

Best regards,

Maolin Pan


RTDRe: How to access FIFO contents in UART FIFO mode

Hi @Maolin_Pan ,

When DMA used, registers BDRL(Tx data), BDRM(Rx Data) are FIFO. I didn't find any way to reflect the content of FIFO except read from the register BDRM for Rx. 

Best regards,

Nhi

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最終更新日:
‎11-21-2025 05:41 PM
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