2163633_en-US

Yes

PFE on S32G A53 QNX ERROR

Hi,NXP experts

We have a custom board that we want to run QNX and PFE drivers on. But we have encountered the following problem and would like to ask PFE experts to help analyze it.

software information:

PFE QNX driver version: 1.8.0

PFE FW version: 1.11.0

QNX SDP version: 7.1.0

BSP version of QNX S32G399A: BSP_nxp-s32g-rdb3_br-710_be-710_SVN996606_JBN10

hardware information:

The difference in hardware between us and the NXP S32G399ARDB3 EVN board is that DDR has been changed to 2GB, and we have already adapted it in Linux, and the pfe Ethernet driver is normal.

The changes are as follows:

1. Changes in images/s32g399a-rdb.build file，

2. Changes in src\hardware\startup\boards\s32g\s32g399a-rdb\s32g_init_raminfo.c file：

3. Other insignificant changes, unrelated to the PFE driver.

My test commands are：

# slog2info -c

# slog2info -w &

# io-pkt-v6-hc -p tcpip pkt_typed_mem=pfe_ddr -d /proc/boot/devnp-pfe-2.so class_fw=/proc/boot/s32g_pfe_class.fw,util_fw=/proc/boot/s32g_pfe_util.fw

However, after running, the error message appears.Log is here.

-------------------Appendix------------------

NOTICE: The list of clocks found enabled during the SCMI agent reset command:

NOTICE: linflex_lin

NOTICE: usdhc_core

board_smp_num_cpu: 8 cores

MMU: 16-bit ASID 40-bit PA TCR_EL1=b5183519

ARM GIC-500 r1p1, arch v3.0 detected

board_smp_num_cpu: 8 cores

No SPI intrinfo. Add default entry for 32 -> 575 vectors, Ok

cpu0: MPIDR=80000000

cpu0: MIDR=410fd034 Cortex-A53 r0p4

cpu0: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu0: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu0: L1 Icache 32K linesz=64 set/way=256/2

cpu0: L1 Dcache 32K linesz=64 set/way=128/4

cpu0: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_num_cpu: 8 cores

A53 CORE CLOCK : 1000MHz

DDR CLOCK : 800MHz

SERDES CLOCK : 2000MHz

LINFLEXD CLOCK : 125MHz

GMAC TS CLOCK : 48MHz

SPI CLOCK : 48MHz

QSPI CLOCK : 800MHz

SDHC CLOCK : 800MHz

Loading IFS...decompressing...done

board_smp_start: cpu_cluster_id: 0, cpu_id: 1

NOTICE: S32 TF-A: s32_pwr_domain_on: booting up core 1 (0)

running

cpu1: MPIDR=80000001

cpu1: MIDR=410fd034 Cortex-A53 r0p4

cpu1: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu1: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu1: L1 Icache 32K linesz=64 set/way=256/2

cpu1: L1 Dcache 32K linesz=64 set/way=128/4

cpu1: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 0, cpu_id: 2

NOTTCE: S32 T TA: s323pw_pdomrin_on: bootingnup cor 2u 0)

nning

cpu2: MPIDR=80000002

cpu2: MIDR=410fd034 Cortex-A53 r0p4

cpu2: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu2: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu2: L1 Icache 32K linesz=64 set/way=256/2

cpu2: L1 Dcache 32K linesz=64 set/way=128/4

cpu2: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 0, cpu_id: 3

ngTICE: SS32TT-A:: 32_pwr_rodain_on: booting up cpre 3 (0n

cpu3: MPIDR=80000003

cpu3: MIDR=410fd034 Cortex-A53 r0p4

cpu3: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu3: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu3: L1 Icache 32K linesz=64 set/way=256/2

cpu3: L1 Dcache 32K linesz=64 set/way=128/4

cpu3: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 1, cpu_id: 0

NOTICE: S32 TF-A: s32_pwr_domain_on: booting up core 4 (0)

NOTICE: S32 TF-A: s32_pwr_domain_on_finish: cpu 4 running

cpu4: MPIDR=80000100

cpu4: MIDR=410fd034 Cortex-A53 r0p4

cpu4: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu4: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu4: L1 Icache 32K linesz=64 set/way=256/2

cpu4: L1 Dcache 32K linesz=64 set/way=128/4

cpu4: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 1, cpu_id: 1

NOTICE: S32 TF-A: s32_pwr_domain_on: booting up core 5 (0)

cpu 5 running

cpu5: MPIDR=80000101

cpu5: MIDR=410fd034 Cortex-A53 r0p4

cpu5: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu5: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu5: L1 Icache 32K linesz=64 set/way=256/2

cpu5: L1 Dcache 32K linesz=64 set/way=128/4

cpu5: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 1, cpu_id: 2

NOTICE: S32 TF-A: s32_pwr_domain_on: booting up core 6 (0)

nning

cpu6: MPIDR=80000102

cpu6: MIDR=410fd034 Cortex-A53 r0p4

cpu6: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu6: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu6: L1 Icache 32K linesz=64 set/way=256/2

cpu6: L1 Dcache 32K linesz=64 set/way=128/4

cpu6: L2 Unified 1024K linesz=64 set/way=1024/16

board_smp_start: cpu_cluster_id: 1, cpu_id: 3

NOTICE: S32 TF-A: s32_pwr_domain_on: booting up core 7 (0)

7 running

cpu7: MPIDR=80000103

cpu7: MIDR=410fd034 Cortex-A53 r0p4

cpu7: CWG=4 ERG=4 Dminline=4 Iminline=4 VIPT

cpu7: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1

cpu7: L1 Icache 32K linesz=64 set/way=256/2

cpu7: L1 Dcache 32K linesz=64 set/way=128/4

cpu7: L2 Unified 1024K linesz=64 set/way=1024/16

System page at phys:00000000a0010000 user:ffffff8040315000 kern:ffffff8040311000

Starting next program at vffffff8060097300

ClockCycles samples:

0 62957977

1 62957977

2 62957978

3 62957977

4 62957977

5 62957977

6 62957977

7 62957977

All ClockCycles offsets within tolerance

Welcome to QNX Neutrino 7.1.0 on the NXP S32G399A RDB Board!!

Starting watchdog...

Starting serial driver ...

Starting Networking driver (/dev/socket)...

Starting SPI driver (/dev/spi0,1,2,3,4,5)...

Starting I2C 0/1/2/3/4 driver (/dev/i2c0,1,2,3,4)...

Starting USDHC0 memory card driver...

Path=Starting CAN driver...

0 - imx

target=0 lun=0 Direct-Access(0) - SDMMC: AAM20E Rev: 1.0

#

# slog2info -c

Process 4117 (slog2info) exited status=0.

ghccu# slog2info -w &

[1] 12309

random.4 low 0 -----UNSYNC-----

random.4 high 0 -----UNSYNC-----

Jan 01 00:00:00.022 console.3 0 -----ONLINE-----

console.3 out 0 -----UNSYNC-----

Jan 01 00:00:00.027 random.4 0 -----ONLINE-----

random.4 default 0 -----UNSYNC-----

Jan 01 00:00:00.028 random.4..0 0 -----ONLINE-----

random.4..0 slog 0 -----UNSYNC-----

Jan 01 00:00:00.050 devc_serlinflexd.7 0 -----ONLINE-----

devc_serlinflexd.7 slog 0 -----UNSYNC-----

Jan 01 00:00:00.055 spi_master.8 0 -----ONLINE-----

spi_master.8 normal 0 -----UNSYNC-----

Jan 01 00:00:00.059 spi_master.9 0 -----ONLINE-----

spi_master.9 normal 0 -----UNSYNC-----

Jan 01 00:00:00.063 spi_master.10 0 -----ONLINE-----

spi_master.10 normal 0 -----UNSYNC-----

Jan 01 00:00:00.067 spi_master.11 0 -----ONLINE-----

spi_master.11 normal 0 -----UNSYNC-----

Jan 01 00:00:00.088 devb_sdmmc_mx8x.17 0 -----ONLINE-----

devb_sdmmc_mx8x.17 slog 0 -----UNSYNC-----

Jan 01 00:00:04.268 qconn.20 0 -----ONLINE-----

qconn.20 slog 0 -----UNSYNC-----

#

# io-pkt-v6-hc -p tcpip pkt_typed_mem=pfe_ddr -d /proc/boot/devnp-pfe-2.so class_fw=/proc/boot/s32g_pfe_class.fw,util_fw=/proc/boot/s32g_pfe_util.fw

# Jan 01 00:00:14.060 iopkt.16408 0 -----ONLINE-----

Jan 01 00:00:14.060 iopkt.16408 main_buffer* 0 detect_armv8ce_hw: armv8ce is supported!

Jan 01 00:00:14.061 iopkt.16408 main_buffer 0 tcpip starting

Jan 01 00:00:14.062 iopkt.16408 main_buffer 0 smmu support is disabled

Jan 01 00:00:14.063 iopkt.16408 main_buffer 0 initializing IPsec...

Jan 01 00:00:14.063 iopkt.16408 main_buffer 0 done

Jan 01 00:00:14.064 iopkt.16408 main_buffer 0 IPsec: Initialized Security Association Processing.

Jan 01 00:00:14.067 iopkt.16408 main_buffer 0 /proc/boot/devnp-pfe-2.so class_fw=/proc/boot/s32g_pfe_class.fw,util_fw=/proc/boot/s32g_pfe_util.fw

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 0 -----ONLINE-----

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 slog* 0 INF[src/pfe_drv.c:1346]: VERSION INFO

Driver version: 1.8.0

Driver commit hash: 57b6eefdb35cbff7a43ecfbdca3334760b1d0553

PFE_CFG_MULTI_INSTANCE_SUPPORT: 0

PFE_CFG_LOCAL_IF: 6

PFE_CFG_MASTER_IF: 6

PFE_CFG_SC_HIF: 1

PFE_CFG_HIF_RING_LENGTH: 256

PFE_CFG_PFE0_PROMISC: 1

PFE_CFG_PFE1_PROMISC: 1

PFE_CFG_PFE2_PROMISC: 1

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1353]: --- Safe IRQ enabled. No InterrupAttach() or InterruptAttach_r() allowed.

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_fw.c:94]: 45724 bytes read

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_fw.c:100]: Loaded firmware file: /proc/boot/s32g_pfe_class.fw

Jan 01 00:00:14.068 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_fw.c:94]: 23352 bytes read

Jan 01 00:00:14.069 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_fw.c:100]: Loaded firmware file: /proc/boot/s32g_pfe_util.fw

Jan 01 00:00:14.069 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1449]: MII mode configuration for pfe0/EMAC0 not found. Using SGMII.

Jan 01 00:00:14.069 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1449]: MII mode configuration for pfe1/EMAC1 not found. Using SGMII.

Jan 01 00:00:14.069 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1449]: MII mode configuration for pfe2/EMAC2 not found. Using SGMII.

Jan 01 00:00:14.069 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1467]: Issuing PFE peripheral reset...

Jan 01 00:00:14.179 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1468]: PFE reset OK.

Jan 01 00:00:14.179 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2826]: PFE CBUS p0x46000000 mapped @ v0x1e2a574000 (0x1000000 bytes)

Jan 01 00:00:14.179 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2831]: HW version 0x101

Jan 01 00:00:14.179 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_hw_feature.c:95]: Silicon S32G3

Jan 01 00:00:14.179 io_pkt_v6_hc.16408 slog 0 WRN[hw/s32g/pfe_platform_master.c:2843]: Fail-Stop mode disabled

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2093]: PFE_ERRORS:Parity instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2108]: PFE_ERRORS:Watchdog instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2124]: PFE_ERRORS:Bus Error instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2137]: PFE_ERRORS:FW Fail Stop instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2150]: PFE_ERRORS:Host Fail Stop instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2163]: PFE_ERRORS:Fail Stop instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:2176]: PFE_ERRORS:ECC Err instance created

Jan 01 00:00:14.254 io_pkt_v6_hc.16408 slog 0 INF[hw/s32g/pfe_platform_master.c:1097]: BMU1 buffer base: p0xc0000000

Jan 01 00:00:14.255 io_pkt_v6_hc.16408 slog 0 ERR[src/oal_mm_qnx.c:98]: (DRIVER) event 1 - Driver runtime error: mmap64() failed: 1

Jan 01 00:00:14.255 io_pkt_v6_hc.16408 slog 0 ERR[src/oal_mm_qnx.c:171]: (DRIVER) event 1 - Driver runtime error: Can't get memory block

Jan 01 00:00:14.255 io_pkt_v6_hc.16408 slog 0 ERR[hw/s32g/pfe_platform_master.c:1125]: (DRIVER) event 1 - Driver runtime error: Unable to get BMU2 pool memory

Jan 01 00:00:14.256 io_pkt_v6_hc.16408 slog 0 ERR[src/pfe_drv.c:1529]: (DRIVER) event 1 - Driver runtime error: Unable to initialize the platform

Jan 01 00:00:14.257 iopkt.16408 main_buffer 0 Unable to init /proc/boot/devnp-pfe-2.so: No such device

Jan 01 00:00:14.257 io_pkt_v6_hc.16408 slog 0 INF[src/pfe_drv.c:1302]: PFE entry failed, PFE driver terminated

#

Re: PFE on S32G A53 QNX ERROR

Hello, @SandalWood

I feel very sorry for late response.

Not sure if the issue has been resolved?

May I know if there was a environment variable skip_scmi_reset_agent set in your uboot?

If not, try setting the following: "setenv skip_scmi_reset_agent '1'"

BR

Chenyin

Re: PFE on S32G A53 QNX ERROR

Hello, @SandalWood

Thanks for the reply.

1. I suggest reviewing the "PFE_QNX_DRV_IntegrationManual.pdf", which is included in PFE driver release package and assure that each step(Building, Running driver) is correct.

2. If the DTB file worked well in Linux, then the original one in QNX should be replaced with it.

Would you mind trying it again and let me know the test result.

BR

Chenyin

Re: PFE on S32G A53 QNX ERROR

Hello, @SandalWood

Thanks for you reply.

Yes, I understand the situation now.

Will investigate it and reply you later when there are any findings.

BR

Chenyin

Re: PFE on S32G A53 QNX ERROR

1.The location of the pfe DDR cannot use the example provided in the NXP manual and must be changed to an idle location to prevent overlap with the reserved memory.

2.I haven't made any dynamic changes.My run cmd is:io-pkt-v6-hc -p tcpip pkt_typed_mem=pfe_ddr -d /proc/boot/devnp-pfe-2.so pfe0_link=1000-1-3,pfe0_mac=025556000050,class_fw=/proc/boot/s32g_pfe_class.fw,util_fw=/proc/boot/s32g_pfe_util.fw

And I did not make any dynamic changes, I did not modify the environment variables of uboot. Linux and QNX use the same uboot image. So, I understand that the configuration of Serdes on QNX should be the same as Linux, right?

Re: PFE on S32G A53 QNX ERROR

Hello, @SandalWood

Glad that the ddr issue resolved, would you mind sharing the reasons?

For the ping issue mentioned, have you mentioned the driver limitation below:

BR

Chenyin

Re: PFE on S32G A53 QNX ERROR

Hi,
We have resolved the ddr error, but there may be an new issue during ping.
The pfe0 in our board is directly connected to the external swtich through MAC-TO-MAC(SGMII MODE). In a Linux environment, this link is normal and can communicate with the external environment normally, such as ping being OK. But after replacing Linux with the current QNX, the ping problem will occur.
In Linux, we changed the device tree and configured pfe0 to fix sgmii mode. I suspect it's related to this, but I don't know how to configure it in QNX。
The log please see the attach.

Re: PFE on S32G A53 QNX ERROR

160 is hex 0xa0,it seems that pfe_ddr is ok

# pidin sys=asinfo
Header size=0x00000108, Total Size=0x00001050, #Cpu=8, Type=257
Section:asinfo offset:0x00000b90 size:0x00000200 elsize:0x00000020
0000) 0000000000000000-0000ffffffffffff o:ffff a:0010 p:100 c:0 n:/memory
0020) 0000000000000000-00000000ffffffff o:0000 a:0010 p:100 c:0 n:/memory/below4G
0040) 0000000080000000-00000000ffffffff o:0020 a:0017 p:100 c:0 n:/memory/below4G/ram
0060) 0000000880000000-00000008dfffffff o:0000 a:0017 p:100 c:0 n:/memory/ram
0080) 00000000ff800000-00000000ff83afff o:0040 a:0005 p:100 c:0 n:/memory/below4G/ram/atf
00a0) 0000000080000000-0000000083ffffff o:0040 a:0007 p:100 c:0 n:/memory/below4G/ram/pfe_ddr
00c0) 0000000050800000-000000005080ffff o:0000 a:0003 p:100 c:0 n:/memory/gicd
00e0) 0000000050900000-00000000509fffff o:0000 a:0003 p:100 c:0 n:/memory/gicr
0100) 0000000088000080-0000000088007fff o:0040 a:0005 p:100 c:0 n:/memory/below4G/ram/fdt
0120) 00000000800d10a8-00000000815fa8b3 o:0000 a:0005 p:100 c:0 n:/memory/imagefs
0140) 0000000080080fa0-00000000800d10a7 o:0000 a:0007 p:100 c:0 n:/memory/startup
0160) 00000000800d10a8-00000000815fa8b3 o:0000 a:0007 p:100 c:0 n:/memory/bootram
0180) 00000000a0000000-00000000a0007fff o:0040 a:0007 p:100 c:0 n:/memory/below4G/ram/sysram
01a0) 00000000a0014000-00000000ff7fffff o:0040 a:0007 p:100 c:0 n:/memory/below4G/ram/sysram
01c0) 00000000ff83b000-00000000ffffffff o:0040 a:0007 p:100 c:0 n:/memory/below4G/ram/sysram
01e0) 0000000880000000-00000008dd5e2fff o:0060 a:0007 p:100 c:0 n:/memory/ram/sysram

Re: PFE on S32G A53 QNX ERROR

Hello, @Chen

Thanks for reply.The return code see the log.

BR

SandalWood

Re: PFE on S32G A53 QNX ERROR

Hello, @SandalWood

Thanks for the post.

Seems the memory is not correctly mapped, may I know if there is a log indicating that as_add_containing() was successful called?

BR

Chenyin