backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight_en>;
power-supply = <®_vdd_5v>;
pwms = <&tpm3 3 5000000 0>;
brightness-levels = <0 100>;
num-interpolated-steps = <100>;
default-brightness-level = <50>;
enable-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
panel {
compatible = "tianma,aw0800";
power-supply = <®_vdd_3v3>;
backlight = <&backlight>;
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pinctrl_lcd_en>;
data-mapping = "spwg";
status = "okay";
port {
panel_in_lvds0: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
};
&dphy {
status = "disabled";
};
&dsi {
status = "disabled";
};
&lcdif {
assigned-clock-rates = <519750000>, /*74250000 x 7*/
<74250000>,
<400000000>,
<133333333>;
status = "okay";
};
&ldb {
status = "okay";
lvds-channel@0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
reg = <1>;
lvds_out: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
};
};
&ldb_phy {
status = "okay";
};
&tpm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&iomuxc {
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX93_PAD_GPIO_IO24__TPM3_CH3 0x19e /* BL_PWM*/
>;
};
pinctrl_backlight_en: backlightgrp {
fsl,pins = <
MX93_PAD_GPIO_IO11__GPIO2_IO11 0x51e /* BL_EN*/
>;
};
pinctrl_lcd_en: panelgrp {
fsl,pins = <
MX93_PAD_GPIO_IO08__GPIO2_IO08 0x51e /* LCD_EN */
>;
};
};
And the definition of the display:
And the drm display mode is like this: "
static const struct drm_display_mode tianma_aw0800_mode = {
.clock = 74250,
.hdisplay = 1280,
.hsync_start = 1280 + 110,
.hsync_end = 1280 + 110 + 40,
.htotal = 1280 + 110 + 40 + 220,
.vdisplay = 720,
.vsync_start = 720 + 5,
.vsync_end = 720 + 5 + 5,
.vtotal = 720 + 5 + 5 + 20,
};
static const struct panel_desc tianma_aw0800 = {
.modes = &tianma_aw0800_mode,
.num_modes = 1,
.bpc = 8,
.size = {
.width = 177,
.height = 99,
},
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
.bus_flags = DRM_BUS_FLAG_DE_HIGH,
.connector_type = DRM_MODE_CONNECTOR_LVDS,
};