2155492_en-US

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

2155492_en-US

2155492_en-US

T2080 IRQ0 and PCIE INT# determination

We have a desire to use both the IRQ0 pin on the T2080 and receive the PCI assert/deassert INTB messages on PCIe4. The T2080 maps those two on top of each other. Is there a means of determining if the pin, or the PCIe bus is causing IRQ0 to be asserted. Can the state of the pin itself be read from a register, or is there a means to determine that the source was from PCIe instead of the pin. We are not using the IRQ0 pin for PCIe, rather another purpose.

QorIQ T2 Devices
タグ(1)
評価なし
バージョン履歴
最終更新日:
‎11-20-2025 02:34 PM
更新者: