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MIMXRT1024 and ERR011164 - ADC_ETC with DMA

Hello, is the workaround for ERR011164 usable when using more than 1 trigger chain? How to tell which DMA request to clear in DMA_CTRL of ADC_ETC?

Is there any other way to use ADC and ADC_ETC with DMA?

I tried to use PIT + ADC_ETC and read ADC results of ADC1 and ADC2 with DMA based on ADC DMA requests. It looks like ADC_ETC is clearing the DMA requests of ADC when it clears the COCO bits. This causes some ADC results to be lost when there are ADC1 and ADC2 conversions completed at a same time. One DMA is performed, but other DMA request is lost.

I have ADC1 and ADC2 synced together by ADC_ETC triggers 0 and 4 to achieve sampling of voltage and current based on PIT.

Any way to solve this?

i.MXRT 102xRe: MIMXRT1024 and ERR011164 - ADC_ETC with DMA

Hi,

As the above answer, if you encounter this issue, refer to the workable solution. And, NXP cannot provide an SDK or proposed solution as the mentioned Errata .

Here is a similar case for reference.

Re: MIMXRT1024 and ERR011164 - ADC_ETC with DMA

I think this doesn't really answer the question: Is the workaround for ERR011164 usable when using more than 1 trigger chain? If yes, then how? How to tell which DMA request to clear in DMA_CTRL of ADC_ETC?

Re: MIMXRT1024 and ERR011164 - ADC_ETC with DMA

Hi,

Yes, this Errata of RT1024CE shows this ERR as the following.

ERR011164 ADC: ADC_ETC fails to clear the ADC_ETC request signals automatically after receiving DMA ack.


Description:
If enable ADC_ETC to trigger DMA transfer, the DMA transfer data send ack out. It does not clear the request signals automatically and continue to trigger DMA.


Projected Impact:
This issue can lead to DMA failure when working with ADC_ETC.


Workarounds:
Configuring two DMA channels for ADC_ETC data transfer. The first DMA channel with low
priority triggered by ADC_ETC request is to transfer ADC_ETC data. The second DMA channel with high priority links to the first channel is to clear request of ADC_ETC by writing DMA_CTRL register. Both channel’s priority need to be higher than any channel used by other peripherals. This solution is result in DMA to transfer ADC_ETC data twice for one request signal and application need handle the redundant data properly.


Proposed Solution: No fix scheduled


Software Status: Software workaround is not in SDK.

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最終更新日:
‎11-21-2025 11:45 PM
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