Hello, we are using the lx2080A processor, a DDR controller, five 1G×16 DDR devices, and adopting a 64-bit memory. I configured this RCW by disabling the SerDes configuration and programming the FSPI_Flash with reference to your reply as shown in the figure below:您好，我们正在使用 lx2080A 处理器、一个 DDR 控制器、五个 1G×16 的 DDR 设备，并采用 64 位内存。我根据您的回复禁用了 SerDes 配置，并对 FSPI_Flash 进行了编程，如下面的图所示配置了此 RCW：您好，我们正在使用 lx2080A 处理器、一个 DDR 控制器、五个 1G×16 的 DDR 设备，并采用 64 位内存。我根据您的回复禁用了 SerDes 配置，并对 FSPI_Flash 进行了编程，如下面的图所示配置了此 RCW：
您好，我们正在使用 lx2080A 处理器、一个 DDR 控制器、五个 1G×16 的 DDR 设备，并采用 64 位内存。我根据您的回复禁用了 SerDes 配置，并对 FSPI_Flash 进行了编程，如下面的图所示配置了此 RCW：
I have reviewed your log file and looks like you have configured a DIMM instead a SDRAM
>>
INFO: Invalid SPD at address 0x51
INFO: done with controller 0
ERROR: First slot cannot be empty.
ERROR: Parsing DIMM Error
ERROR: DDR init failed.
NOTICE: Incorrect DRAM0 size is defined in platform_def.h
INFO: DDR Controller 1.
INFO: Configuring TrustZone Controller
INFO: Configuring TrustZone Controller
INFO: DDR Controller 2.
INFO: Configuring TrustZone Controller
INFO: Configuring TrustZone Controller
INFO: BL2: Doing platform setup
INFO: BL2: Loading image id 3
WARNING: Firmware Image Package header check failed.
WARNING: Failed to obtain reference to image id=3 (-2)
ERROR: BL2: Failed to load image id 3 (-2)
>>
please double check to the settings into the ddr_init.c
once you modify the file please be sure to build the image.
BR
LFGP
@LFGP Thank you very much. I have uploaded my log information in the comment section.
This is my print information. Please analyze it.
let me know the log regarding your message
>>
1. With reference to the LSDKUG_Rev21.08 document, I compiled and generated TF-A related firmware using flex-builder. The official default firmware, rcw_2200_750_3200_19_5_2_ser_pbi_dis.bin, was synthesized into bl2_flexspi_nor.pbl via flex-builder. After burning it into the FlexSPI Flash, there was output on the serial port
<<
if you have a DDR issue you need to correct the settings in your RCW, if they are correct, then you have to measure the voltaje and clocks of your DDR.
Regarding your last question
>> Is it correct to select "DiscreteType"? ans. yes it is correct.
@LFGP ,This file is log message！Thanks a lot
@LFGP Hello, dear LFGP, here is a description of my questions:
1. With reference to the LSDKUG_Rev21.08 document, I compiled and generated TF-A related firmware using flex-builder. The official default firmware, rcw_2200_750_3200_19_5_2_ser_pbi_dis.bin, was synthesized into bl2_flexspi_nor.pbl via flex-builder. After burning it into the FlexSPI Flash, there was output on the serial port. Our DDR hardware is set to use discrete chips. We configured the PBL through the CodeWarrior Development Studio for QorIQ LS series development environment, generated the PBL_Binary.bin file (i.e., RCW), and synthesized bl2_flexspi_nor.pbl via flex-builder. However, after burning it into the FlexSPI Flash, there was no output on the serial port.
2. By modifying the DDR configuration parameters, we used the ddr_init.c (for setting DDR parameters), ddr.h, and platform_def1.h (for configuring DDR hardware type) in the Generated_Code path under the project directory to synchronously modify the corresponding ddr_init.c, platform_def.h, etc., in flex-builder (path: components/firmware/atf/plat/nxp/soc-lx2160a/lx2160ardb). Is this modification method correct?
3. Our hardware uses DDR4 discrete chips. Is it correct to select "DiscreteType"?3. 我们的硬件使用的是 DDR4 离散芯片。选择“DiscreteType”正确吗？
Generated_Code.rar is the code generated after modifying ddr.Pbl_binary.bin is the code we generated based on the actual hardware configuration. rcw_2200_750_3200_19_5_2_ser_pbi_dis.bin file is the file generated using the official compilation.
please share your RCW configuration file and the SERDES options you have stated.
The replay you mentioned is not from someone in NXP.
Also please share the log boot.
thanks for your comprehension.
BR
LFGP