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How to Protect Core Peripherals from Non-Trusted ISRs on S32M244 (ARM Cortex-M4F)

Hello all,

I'm working with the S32M244 which uses an ARM Cortex-M4F core. I understand that the AIPS module can be used to protect system peripherals by configuring access rights. However, I'm concerned about protecting core peripherals (e.g., NVIC, Sys Tick, SCB) from non-trusted ISRs.

Since all ISRs on Cortex-M4F run in privileged mode, even non-trusted ISRs can potentially access core peripherals. Given that:

The Cortex-M4F does not support Trust Zone,
The ARM MPU is not available on S32M244,
AIPS does not cover core peripherals,

What are the recommended strategies to restrict access to core peripherals from non-trusted ISRs?

Thanks in advance.

S32M2

Re: How to Protect Core Peripherals from Non-Trusted ISRs on S32M244 (ARM Cortex-M4F)

Hello @Gokul_1,

It is not possible to restrict the ISRs from accessing the registers as you pointed out.

In general, every ISR should be as short as possible, use code review and static analysis, the non-rusted ISR can be placed in sectors that are write-protected (FPROT).

S32M24x targets ASIL-B applications, refer to the safety manual that describes software safety measures that should be implemented to achieve the desired system level of functional safety integrity.

Regards,

Daniel