Hi All,
I've created a project, that specifies a shared memory section in the flash across Core 0 (Z4_0) and Core 1 (Z4_1) of the MPC5748G development board.
I've configured LEDs PA10 and DS11 to represent Core 0 running properly. I've also configured LEDs PA7 and DS10 to represent Core 1 running properly. In Debug, there's no issue.
When i terminate the debug session and reconnect the board - my project fails.
If I comment out any shared memory section access, everything works in debug or standard.
What am i missing ? I've attached the project in this post.
Ok, I expected that the elf files are up to date.
Anyway, it's caused by missing RAM initialization.
Core Z4_0 initializes first 256KB by its startup file:
Core Z4_1 initializes next 256KB:
Remaining 256KB is usually initialized by Z2 core which is not present in your project... even if it is defined in project properties:
So, you put shared_memory to those last 256KB:
But it's not initialized:
If you use debugger in S32DS, it initializes whole RAM explicitly. If you run without debugger, it will crash on bus error when accessing uninitialized RAM.
You need to ensure that also this RAM is initialized.
Regards,
Lukas
This code definitely compiles and runs in debug mode.
Under "Z4_0 / Sources / shared_mem.c" rxCAN is defined as volatile. I may of commented out "rxCAN" the last time I compiled, for testing purposes.
I've linked Z4_0's compiled shared_func and shared_mem ".o" files under Z4_1's project properties. This was a hardcoded path on my machine, so will need to be changed for another machine.
When you reference the code in main.c, is this for Z4_0 or Z4_1? I've changed my boot order to Z4_0 first if this is what's causing confusion.
Hi @EmbeddedS
Was this code really working in debug mode?
I just load your elf files to my board (I didn't compile the projects again) and I can see that rxCAN is optimized out and it looks like the code in main.c does not correspond to elf file in the Z4_1 project.
Regards,
Lukas