The amplitude of the clock waveform output from PCIE_REFCLKOUT_P/N is 600mVpp.
I would like to increase the amplitude of this waveform.
An external clock waveform of 900 mVpp is input to PCIE_REFCLKIN_P/N.
The waveform output from PCIE_REFCLKOUT_P/N does not change whether REFCLK_SEL is set to High or Low.
Please tell me the following.
* There is no block diagram of PCIE_REFCLKOUT_P/N in the ReferenceManual. Is it possible for you to tell me?
* Does REFCLK_SEL change the input signal of the clock waveform output from PCIE_REFCLKOUT_P/N?
* If I set REFCLK_SEL high, will the clock waveform output from PCIE_REFCLKOUT_P/N be generated from PCIE_REFCLKIN_P/N?
* Does the clock buffer inside the SoC limit the amplitude of the waveform?
I found that PCIE_REFCLKIN_P/N can be the source of PCIE_REFCLKOUT_P/N, and waveform is limited.
Best regards.
Hello,
1 - We do not have a block diagram representation for differential PCIE_REFCLKOUT generation in analog side. The clock source can be consulted in clock tree of reference manual and is selected according to the next diagram:
2 - Yes, when driven high, REFCLK_EXT is the reference clock of PHY.
3 - As mentioned before, when driven high, REFCLK_EXT (Internal Reference Clock Input) is the reference clock of PHY.
4 - Yes, that is correct.
Best regards.