2062116_en-US

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What causes the RT685 SYSRSTSTAT register bit "ARM_APD_RESET" to be set?

The "ARM_APD_RESET" bit of the SYSRSTSTAT register is described as "ARM RESET Event Detected"- what causes an "ARM RESET Event", and this bit to be set when the chip comes out of reset?

Thanks!

i.MXRT 600Re: What causes the RT685 SYSRSTSTAT register bit "ARM_APD_RESET" to be set?

Hi @NoahPendleton_Memfault,

That is correct! 

Re: What causes the RT685 SYSRSTSTAT register bit "ARM_APD_RESET" to be set?

From some quick testing, I am able to confirm:

- VDD_POR is set when the chip is powered up

- PAD_RESET is set when the reset pin is used to reset the chip

- ARM_APD_RESET is set when I use the debugger to reset the chip, or when NVIC_SystemReset() is triggered

Let me know if I got any wrong!

Re: What causes the RT685 SYSRSTSTAT register bit "ARM_APD_RESET" to be set?

Thanks for the response @EdwinHz ! Will the bit be set from an NVIC SysReset, or only a reset from the debug port?

Re: What causes the RT685 SYSRSTSTAT register bit "ARM_APD_RESET" to be set?

Hi @NoahPendleton_Memfault,

This bit indicates whether the ARM kernel has had a soft reset or not, as mentioned in the following blog post: https://www.cnblogs.com/henjay724/p/14027404.html.