Hello experts,
I have LS1088a based custom board. When I power on the device, the processor clock configuration in u-boot(boot by SD) is running at 1.2 GHz.
SoC: LS1088AE Rev1.0 (0x87030010)
Clock Configuration:
CPU0(A53):1200 MHz CPU1(A53):1200 MHz CPU2(A53):1200 MHz
CPU3(A53):1200 MHz CPU4(A53):1200 MHz CPU5(A53):1200 MHz
CPU6(A53):1200 MHz CPU7(A53):1200 MHz
Bus: 500 MHz DDR: 1600 MT/sHow do I increase the core frequency to 1.6GHz? If the clock configuration is related to RCW, which document and which section should I review?
Some components were used differently compared to the reference design. If you have any questions about these, I will get back to you immediately.
Thank you.
The DDR controller configuration parameters are different when DDR data rate are 2100 MT/s and 1900 MT/s.
Please use QCVS DDRv tool to connect to the target board to do DDR validation and optimization to get DDR controller configuration parameters at 2100 MT/s DDR data rate.
Then use these parameters to modify plat/nxp/soc-ls1088a/ls1088ardb/ddr_init.c according to the file generated by QCVS DDR tool.
You could create a new thread to continue to discuss DDR validation issue.
@yipingwang Thank you for your support. CPU runs 1.6GHz and I increased DDR data rate to 1900 MT/s at now.
Clock Configuration:
CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz
CPU3(A53):1600 MHz CPU4(A53):1600 MHz CPU5(A53):1600 MHz
CPU6(A53):1600 MHz CPU7(A53):1600 MHz
Bus: 500 MHz DDR: 1900 MT/s When I try to 2100 MT/s data rate (MEM_PLL_RAT=21), I got this error:
ERROR: Found training error(s): 0x2000
ERROR: Error: Waiting for D_INIT timeout.
ERROR: Writing DDR register(s) failed
ERROR: Programing DDRC error
ERROR: DDR init failed.
NOTICE: Incorrect DRAM0 size is defined in platfor_def.h
ERROR: mmap_add_region_check() failed. error -22
ERROR: mmap_add_region_check() failed. error -22 I looked through the LS1088ARM document a bit, but I couldn't see the exact value ranges. What values do I need to assign to work at a data rate of 2100 MT/s?
Sys PLL Ref clock:100MHz and My current RCW values are as follows:
SYS_PLL_RAT=7 /* 5 */
MEM_PLL_RAT=21
CGA_PLL1_RAT=16
CGA_PLL2_RAT=16
HWA_CGA_M1_CLK_SEL=2
HWA_CGA_M2_CLK_SEL=1
DDR_REFCLK_SEL=2
DRAM_LAT=1Please configure the following fields in RCW, please refer to "4.8.7.8.1 RCW" in LS1088ARM.
CGA_PLL1_RAT
CGA_PLL2_RAT
For example, Sys PLL Ref clock:100MHz
CGA_PLL1_RAT=16
CGA_PLL2_RAT=16