Hello!
In the PRAMC chapter of the MPC5777C RM there is one figure that I did not understand quite well. In my interpretation, this image suggests that there might be a direct connection between the PRAMC and the PFLASH. I searched more about it in the reference manual, but did not find more details.
1 - How do I know if my device has this connection?
2 - In which situation is this connection used?
3 - What are the properties of this connection? Is this also a 64 bits width AHB?
4 - The RM says that "The RAM controller supports two 64-bit AHB interfaces and a 64-bit RAM array interface. The primary AHB port provides a connection to the platform crossbar for direct RAM access from the various crossbar masters." I thought that the two AHB interfaces were individually connected to the PRAMC_0 and PRAMC_1. However, with this possible connection to the PFLASH, I am not sure about that. The text says that "the primary AHB port provides a connection to the platform crossbar". What about the secondary AHB port? What does it do? Is it the connection to the PFLASH?
Best regards,
Matheus
1) Flash overlay means you can read data from RAM instead of flash, portion of flash address is remapped to RAM for development purposes. But how I said, this is NOT used on MPC5777C. There is no direct interconnection between FLASH and RAM.
2) One XBAR slave port is connected to PRAMC_0 and one XBAR slave port is connected to PRAMC_1. Nothing else
4) So each of the two 64-bit AHB interfaces are indeed connected to PRAMC_0 and PRAMC_1?
1,2) It is related to devices having flash overlay feature what's just not the case Cof MPC5777C. All other MPC57xx device has the feature.
MPC5777C cores have MMU allowing using of virtual/physical address translation what can be used instead.
3) Yes, it would be.
4) PRAMC_0 and PRAMC_1 are two independent instances. There is not PFLASH to PRAMC connection on this device.