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[#1]

IMX8ULPIEC SAI interfase

Good day to all.
I have a task of programming SAI interface for i.mx 8 under m-33 core. I figured out that SAI0 and SAI1 are suitable for me, but I can't figure out from the IO Muxing pins I need. Alternative function for I2S?
For example PTA1 witch Output7 function(I2S0_RX_FS)  will work as FS for SAI0 with User Defined Protocol?

i.MX8ULPRe: IMX8ULPIEC SAI interfase

This is what I needed, thank you!

Re: IMX8ULPIEC SAI interfase

Hello @Sandroom 

I hope you are doing very well.

Please refer to the SDK of the i.MX8ULP. You can download it from MCUXpresso SDK.

Check the SAI examples under SDK_2_16_000_EVK-MIMX8ULP/boards/evkmimx8ulp/driver_examples/sai/interrupt_transfer.

There is a File called pin_mux.c.

There are defined the mux odtions for the pads including PTA1.

void BOARD_InitPins(void) {                                /*!< Function assigned for the core: Cortex-M33[cm33] */
    IOMUXC_SetPinMux(IOMUXC_PTA0_I2S0_RX_BCLK, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA0_I2S0_RX_BCLK,
                        IOMUXC_PCR_DSE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA1_I2S0_RX_FS, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA1_I2S0_RX_FS,
                        IOMUXC_PCR_DSE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA10_LPUART1_TX, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA10_LPUART1_TX,
                        IOMUXC_PCR_PE_MASK |
                        IOMUXC_PCR_PS_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA11_LPUART1_RX, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA11_LPUART1_RX,
                        IOMUXC_PCR_PE_MASK |
                        IOMUXC_PCR_PS_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA2_I2S0_RXD0, 0U);
    IOMUXC_SetPinMux(IOMUXC_PTA4_I2S0_MCLK, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA4_I2S0_MCLK,
                        IOMUXC_PCR_OBE_MASK |
                        IOMUXC_PCR_DSE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA7_I2S0_TXD0, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA7_I2S0_TXD0,
                        IOMUXC_PCR_DSE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA8_PTA8, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA8_PTA8,
                        IOMUXC_PCR_OBE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA9_PTA9, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA9_PTA9,
                        IOMUXC_PCR_OBE_MASK);
}

Best regards,

Salas.