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The ENET1 module does not function unless the Peripheral control register (MC_ME_PCTL6) is enabled

Project file: lwip_mpc5748g

Development board model: 2018 NXP BV MPC5748G-GW

Follow the steps in MPC5748G-GW-RDB_ExampleCodes-UserGuide to develop ENET1 example.png

However, even PING is not working at present. I have tried to add ARP table on PC according to some relevant answers in the forum, but PING is still not working. At this time, I found that there were marking errors when reading the document, but after checking the register description, I did not quite understand what kind of setting is meant by enable here.

ERROR.png


MPC5748G-GW-RDB 

Re: The ENET1 module does not function unless the Peripheral control register (MC_ME_PCTL6) is enab

Hi,

it is done in MC_ME which allows peripheral clock gating control based on the ME_RUN_PC0…7, ME_LP_PC0…7,
and ME_PCTLn registers. So the errata say you need to enable clock for MLB0 module too, so contig one of ME_RUN_PC0…7 and ME_PCTL6 and do Mode Transition. Refer to chapter Mode Entry Module (MC_ME) of the device RM for more info.
If using SDK in your project it should be enough to enable MLB0 clock within clock component and regenerate PE code. CLOCK_SYS_Init and CLOCK_SYS_UpdateConfiguration called in code should set MC_ME registers accordingly.
In debugger you can check MC_ME_PS0 to know MLB0 clock is active.

BR, Petr

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最后更新:
‎01-05-2026 12:39 AM
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